Patent classifications
H04L49/9015
DATA SCHEDULING METHOD AND SWITCHING DEVICE
Embodiments of this application provide a method, includes: receiving N.sub.1 data units from a first data flow; inputting the N.sub.1 data units into a first source queue; determining that the first data flow is switched from the first source queue to a first target queue, where the first source queue and the first target queue belong to a first queue pair; inputting a first source marking unit into the first source queue, and inputting a first target marking unit into the first target queue; receiving M.sub.1 data units from the first data flow; inputting the M.sub.1 data units into the first target queue; and scheduling the N.sub.1 data units and the first source marking unit from the first source queue based on the first source marking unit and the first target marking unit, and scheduling the first target marking unit and the M.sub.1 data units from the first target queue.
METHOD AND APPARATUS FOR USING MULTIPLE LINKED MEMORY LISTS
An apparatus and method for queuing data to a memory buffer. The method includes selecting a queue from a plurality of queues; receiving a token of data from the selected queue and requesting, by a queue module, addresses and pointers from a buffer manager for addresses allocated by the buffer manager for storing the token of data. Subsequently, a memory list is accessed by the buffer manager and addresses and pointers are generated to allocated addresses in the memory list which comprises a plurality of linked memory lists for additional address allocation. The method further includes writing into the accessed memory list the pointers for the allocated address where the pointers link together allocated addresses; and migrating to other memory lists for additional address allocations upon receipt of subsequent tokens of data from the queue; and generating additional pointers linking together the allocated addresses in the other memory lists.
Network processors
The present disclosure is directed to a network processor for processing high volumes of traffic provided by todays access networks at (or near) wireline speeds. The network process can be implemented within a residential gateway to perform, among other functions, routing to deliver high speed data services (e.g., data services with rates up to 10 Gbit/s) from a wide area network (WAN) to end user devices in a local area network (LAN).
High-performance garbage collection in a network device
Efficient garbage collection techniques for network packets and other units of data are described. Constituent portions of a data unit are stored in buffer entries spread out across multiple distinct banks. Linking data is generated and stored on a per-bank basis. The linking data defines, for each bank in which data for the data unit is stored, a chain of all entries in that bank that store data for the data unit. When the data unit is dropped or otherwise disposed of, a chain's head entry address may be placed in a garbage collection list for the corresponding bank. A garbage collector uses the linking data to gradually follow the chain of entries for the given bank, and frees each entry in the chain along the way. Optionally, certain addresses in the chain, including each chain's tail address, are immediately freed for the corresponding bank, without waiting to follow the chain.
APPARATUS AND BUFFER CONTROL METHOD THEREOF IN WIRELESS COMMUNICATION SYSTEM
A 5G communication system or pre-5G communication system for supporting a higher data rate than that of a beyond 4G communication system such as an LTE is provided. A method by an apparatus for controlling buffers in a wireless communication system comprises storing information related to a packet in at least one of a first buffer or a second buffer, transmitting data generated based on the packet, and, when an acknowledgement signal is received for the data, discarding the information.
Method and apparatus for using multiple linked memory lists
An apparatus and method for queuing data to a memory buffer. The method includes selecting a queue from a plurality of queues; receiving a token of data from the selected queue and requesting, by a queue module, addresses and pointers from a buffer manager for addresses allocated by the buffer manager for storing the token of data. Subsequently, a memory list is accessed by the buffer manager and addresses and pointers are generated to allocated addresses in the memory list which comprises a plurality of linked memory lists for additional address allocation. The method further includes writing into the accessed memory list the pointers for the allocated address where the pointers link together allocated addresses; and migrating to other memory lists for additional address allocations upon receipt of subsequent tokens of data from the queue; and generating additional pointers linking together the allocated addresses in the other memory lists.
High Performance Connection Scheduler
Aspects of the disclosure are directed to a high performance connection scheduler for reliable transport protocols in data center networking. The connection scheduler can handle enqueue events, dequeue events, and update events. The connection scheduler can include a connection queue, scheduling queue, and quality of service arbiter to support scheduling a large number of connections at a high rate.
Hierarchical packet buffer system
A switching device includes a primary memory and an traffic manager. The primary memory buffers packets for temporary storage. The traffic manager monitors consumed resources in the device related to the buffering of packets in the primary memory. The traffic manager migrates packets buffered in the primary memory to a secondary memory when the consumed resources exceed a certain threshold. The traffic manager also controls dequeuing of the packets from the primary memory and the secondary memory.
High performance connection scheduler
Aspects of the disclosure are directed to a high performance connection scheduler for reliable transport protocols in data center networking. The connection scheduler can handle enqueue events, dequeue events, and update events. The connection scheduler can include a connection queue, scheduling queue, and quality of service arbiter to support scheduling a large number of connections at a high rate.
Data enqueuing method, data dequeuing method, and queue management circuit
The disclosure describes a data enqueuing method. The method may include: receiving a to-be-enqueued data packet, dividing the data packet into several slices to obtain slice information of the slices, and marking a tail slice of the data packet with a tail slice identifier; enqueuing corresponding slice information according to an order of the slices in the data packet, and in a process of enqueuing the corresponding slice information, if a slice is marked with the tail slice identifier, determining that the slice is the tail slice of the data packet, and generating a first-type node; and determining whether a target queue is empty, and if the target queue is empty, writing slice information of the tail slice into the target queue, and updating a head pointer of a queue head list according to the first-type node.