An apparatus is described. The apparatus includes a program controller to fetch and issue instructions. The apparatus includes an execution lane having at least one execution unit to execute the instructions. The execution lane is part of an execution lane array that is coupled to a two dimensional shift register array structure, wherein, execution lane s of the execution lane array are located at respective array locations and are coupled to dedicated registers at same respective array locations in the two-dimensional shift register array.

A solid-state imaging device is provided. The solid-state imaging device includes an imaging region having a plurality of pixels arranged on a semiconductor substrate, in which each of the pixels includes a photoelectric converting portion and a charge converting portion for converting a charge generated by photoelectric conversion into a pixel signal and blooming is suppressed by controlling a substrate voltage of the semiconductor substrate.

An exemplary embodiment of the present disclosure includes a PCB mounted with an image sensor, a base installed at an upper surface of the PCB to centrally form an optical path, a lens holder coupled to an upper surface of the base to form an optical path by being mounted with at least one or more sheets of lenses, a variable lens arranged on the optical path centrally formed at the base to control a refractive index of passing light, and an infrared cut-off coating layer provided on a surface of the variable lens to filter an infrared component from the optical path-passing light.

Systems and methods for controlling the parameters of groups of focal planes as focal plane groups in an array camera are described. One embodiment includes a plurality of focal planes, and control circuitry configured to control the capture of image data by the pixels within the focal planes. In addition, the control circuitry includes: a plurality of parameter registers, where a given parameter register is associated with one of the focal planes and contains configuration data for the associated focal plane; and a focal plane group register that contains data identifying focal planes that belong to a focal plane group. Furthermore, the control circuitry is configured to control the imaging parameters of the focal planes in the focal plane groups by mapping instructions that address virtual register addresses to the addresses of the parameter registers associated with focal planes within specific focal plane groups.

A solid-state imaging device includes a light receiving section formed by such exposure as to stitch a plurality of patterns in a first direction on a semiconductor substrate. The light receiving section includes a plurality of pixels disposed in a two-dimensional array in the first direction and a second direction perpendicular to the first direction. Electric charges are transferred in the second direction in each of pixel columns consisting of a plurality of pixels disposed in the second direction, among the plurality of pixels.

An image sensor may have a pixel array that includes an array of pixels arranged in rows and columns. Each pixel may include a number of adjacent sub-pixels covered by a single microlens. The adjacent sub-pixels of each pixel may include color filter elements of the same color. Image signals from the sub-pixels may be used to calculate phase information in each pixel in the array. This information may be used to generate a depth map of the entire captured image. The pixels may each be able to detect vertical, horizontal, or diagonal edges. Additionally, the image signals from each photodiode in a pixel may be binned or average to obtain image data for each pixel. The image sensor also may generate high-dynamic-range images using the pixel array.

Methods and systems for coded rolling shutter are provided. In accordance with some embodiments, methods and system are provided that control the readout timing and exposure length for each row of a pixel array in an image sensor, thereby flexibly sampling the three-dimensional space-time value of a scene and capturing sub-images that effectively encode motion and dynamic range information within a single captured image.

A solid-state imaging device includes: a pixel unit in which a plurality of unit pixels is arranged in rows and columns, the unit pixels performing photoelectric conversion of incident light to generate pixel information; and a secondary memory unit in which a plurality of unit memories is arranged in rows and columns, the unit memories holding the pixel information, wherein each of the columns in the secondary memory unit includes, as a unit memory block, the unit memories in the column, the secondary memory unit includes: a memory signal line provided for each of the columns in the memory unit; and a selection transistor provided between the unit memory block and the memory signal line, and shared by the plurality of unit memories in the unit memory block.

The invention concerns an image sensor comprising: at least one pixel having a photodiode (PD); a sensing node (SN) coupled to the photodiode via a transfer gate (104); and a further node (AN) coupled to the sensing node (SN) via a first transistor (112); and a control circuit (120) adapted: to apply, during a reset operation of the voltage levels at the sensing node (SN) and further node (AN), a first voltage level (VDD) to a control node of the first transistor (112); and to apply, during a transfer operation of charge from the photodiode (PD) to the sensing node (SN), a second voltage level (VSK) to the control node of the first transistor (112), the second voltage level being lower than the first voltage level and higher than a ground voltage of the pixel.

A write control unit selects, in a row or column direction, N storing units from N×N storing units for storing pixel data of N (N≧2) read lines of image pickup devices and writes the data in sets of N pixels thereto, and switches a selection direction for selecting the storing units each time writes of the data of N lines are completed. A read control unit selects, in a direction different from the selection direction, N storing units and starts parallel reads of the data of N lines during writes of the data of every N-th line. Each storing unit to be first selected in the writes of the data of every N-th line performs write and read operations using different terminals, and each of the remaining storing units performs write and read operations using a common terminal.