A method of adaptive chroma downsampling is presented. The method comprises converting a source image to a converted image in an output color format, applying a plurality of downsample filters to the converted image and estimating a distortion for each filter chose the filter that produces the minimum distortion. The distortion estimation includes applying an upsample filter, and a pixel is output based on the chosen filter. Methods for closed loop conversions are also presented.

A method of adaptive chroma downsampling is presented. The method comprises converting a source image to a converted image in an output color format, applying a plurality of downsample filters to the converted image and estimating a distortion for each filter chose the filter that produces the minimum distortion. The distortion estimation includes applying an upsample filter, and a pixel is output based on the chosen filter. Methods for closed loop conversions are also presented.

Apparatuses, systems, and methods related to an image processor formed in an array of memory cells are described. An image processor as described herein is configured to reduce complexity and power consumption and/or increase data access bandwidth by performing image processing in the array of memory cells relative to image processing by a host processor external to the memory array. For instance, one apparatus described herein includes sensor circuitry configured to provide an input vector, as a plurality of bits that corresponds to a plurality of color components for an image pixel, and an image processor formed in an array of memory cells. The image processor is coupled to the sensor circuitry to receive the plurality of bits of the input vector. The image processor is configured to perform a color correction operation in the array by performing matrix multiplication on the input vector and a parameter matrix to determine an output vector that is color corrected.

Apparatuses, systems, and methods related to an image processor formed in an array of memory cells are described. An image processor as described herein is configured to reduce complexity and power consumption and/or increase data access bandwidth by performing image processing in the array of memory cells relative to image processing by a host processor external to the memory array. For instance, one apparatus described herein includes sensor circuitry configured to provide an input vector, as a plurality of bits that corresponds to a plurality of color components for an image pixel, and an image processor formed in an array of memory cells. The image processor is coupled to the sensor circuitry to receive the plurality of bits of the input vector. The image processor is configured to perform a color correction operation in the array by performing matrix multiplication on the input vector and a parameter matrix to determine an output vector that is color corrected.

Systems and techniques are provided for processing images. For example, a process can include obtaining a first color image including first one or more pixels from a first image sensor and obtaining a second color image including second one or more pixels from a second sensor, the second color image including infrared (IR) information from a second image sensor. The process can include determining a transformation between colors associated with the first one or more pixels and colors associated with the second one or more pixels based on a comparison associated with the first one or more pixels and the second one or more pixels. The process can include generating a color corrected image at least in part by transforming the second color image including IR information to a color corrected image based on the determined transformation.

Systems and techniques are provided for processing images. For example, a process can include obtaining a first color image including first one or more pixels from a first image sensor and obtaining a second color image including second one or more pixels from a second sensor, the second color image including infrared (IR) information from a second image sensor. The process can include determining a transformation between colors associated with the first one or more pixels and colors associated with the second one or more pixels based on a comparison associated with the first one or more pixels and the second one or more pixels. The process can include generating a color corrected image at least in part by transforming the second color image including IR information to a color corrected image based on the determined transformation.

A display driver that drives a display panel comprises storage circuitry, color addition processing circuitry, and drive circuitry. The storage circuitry stores F subpixel data acquired from color coordinate data indicating color coordinates of a displayed color in a predetermined color space displayed on the display panel when an R subpixel, a G subpixel, and a B subpixel in each of a plurality of pixels of the display panel are driven with drive signals corresponding to a minimum grayscale value and an F subpixel in each of the plurality of pixels which displays an additional color other than a primary color R, a primary color G, and a primary color B is driven with a drive signal corresponding to a maximum grayscale value. The color addition processing circuitry generates output FRGB data from input RGB data, in response to the F subpixel data stored in the storage circuitry.

Embodiments relate to a multi-mode demosaicing circuit able to receive and demosaic image data in a different raw image formats, such as Bayer raw image format and Quad Bayer raw image format. The multi-mode demosaicing circuit comprises different circuitry for demosaicing different image formats that access a shared working memory. In addition, the multi-mode demosaicing circuit shares memory with a post-processing and scaling circuit configured to perform subsequent post-processing and/or scaling of the demosaiced image data, in which the operations of the post-processing and scaling circuit are modified based on the original raw image format of the demosaiced image data to use different amounts of the shared memory, to compensate for additional memory utilized by the multi-mode demosaicing circuit when demosaicing certain types of image data.

Embodiments relate to a multi-mode demosaicing circuit able to receive and demosaic image data in a different raw image formats, such as Bayer raw image format and Quad Bayer raw image format. The multi-mode demosaicing circuit comprises different circuitry for demosaicing different image formats that access a shared working memory. In addition, the multi-mode demosaicing circuit shares memory with a post-processing and scaling circuit configured to perform subsequent post-processing and/or scaling of the demosaiced image data, in which the operations of the post-processing and scaling circuit are modified based on the original raw image format of the demosaiced image data to use different amounts of the shared memory, to compensate for additional memory utilized by the multi-mode demosaicing circuit when demosaicing certain types of image data.

Systems and methods for a multi-primary color system for display. A multi-primary color system increases the number of primary colors available in a color system and color system equipment. Increasing the number of primary colors reduces metameric errors from viewer to viewer. A six-primary color system includes Red, Green, Blue, Cyan, Yellow, and Magenta primaries. The systems of the present invention maintain compatibility with existing color systems and equipment and provide systems for backwards compatibility with older color systems.