An image processing device of an embodiment according to the present disclosure includes: an obtaining section (10B) that sequentially obtains images based on pixel signals respectively for a plurality of pixels which pixel signals are output from a pixel array section including the plurality of pixels; a setting section (10C) that assigns the same identification information to the plurality of images having the same imaging condition and assigns different pieces of identification information to the plurality of images having different imaging conditions; and an output section (10D) that outputs the plurality of images to which the identification information is assigned.

An imaging element includes: a photodiode, a first FD, a second FD, a TRG transistor, an amplification transistor, a DGC transistor for switching a conversion gain, when converting charges into a pixel signal, to a high gain or a low gain, a capacitor, an OFG transistor for transferring charges overflowing from the photodiode to the second FD, and an RST transistor. During an imaging action involving a long exposure time, after reset is carried out, with the conversion gain being switched to the high gain, the pixel signal is read and employed as a high-gain reset signal. Then, after the TRG transistor is conducted, the pixel signal is read and employed as a high-gain signal. A first signal which is a difference between the high-gain signal and the high-gain reset signal is outputted.

An imaging element includes: a photodiode, a first FD, a second FD, a TRG transistor, an amplification transistor, a DGC transistor for switching a conversion gain, when converting charges into a pixel signal, to a high gain or a low gain, a capacitor, an OFG transistor for transferring charges overflowing from the photodiode to the second FD, and an RST transistor. During an imaging action involving a long exposure time, after reset is carried out, with the conversion gain being switched to the high gain, the pixel signal is read and employed as a high-gain reset signal. Then, after the TRG transistor is conducted, the pixel signal is read and employed as a high-gain signal. A first signal which is a difference between the high-gain signal and the high-gain reset signal is outputted.

An object of the present invention is to reduce time required for calibration between gains in a level control circuit. The level control circuit performs, using any of first and second gains that differ from each other, level control of an analog signal output to a vertical signal line that corresponds to each column of a pixel array. An analog-digital converter converts the level-controlled analog signal into a digital signal. A test signal generating unit generates first and second test signals that differ from each other. A gain ratio acquiring unit simultaneously supplies one of the vertical signal lines with the first test signal and supplies another of the vertical signal lines with the second test signal to acquire a gain ratio between the first gain and the second gain of the level control circuit.

An object of the present invention is to reduce time required for calibration between gains in a level control circuit. The level control circuit performs, using any of first and second gains that differ from each other, level control of an analog signal output to a vertical signal line that corresponds to each column of a pixel array. An analog-digital converter converts the level-controlled analog signal into a digital signal. A test signal generating unit generates first and second test signals that differ from each other. A gain ratio acquiring unit simultaneously supplies one of the vertical signal lines with the first test signal and supplies another of the vertical signal lines with the second test signal to acquire a gain ratio between the first gain and the second gain of the level control circuit.

An imaging device includes pixel circuit including a generation unit generating a voltage; a capacitor having a first electrode to which the voltage is applied; a first amplifier having a first input terminal, connected to a second electrode of the capacitor, and a second input terminal, to which a first reference voltage is applied to, to output a result by comparing the voltage with the first reference voltage; a switch unit controlling a connection between the output of the first amplifier and the first input terminal; and a second amplifier having a third input terminal, to which the output of the first amplifier is connected, and a fourth input terminal, to which a second reference voltage is applied, to output a result by comparing the voltage with the second reference voltage, in which a first gain of the first amplifier is lower than a second gain of the second amplifier.

An imaging device includes pixel circuit including a generation unit generating a voltage; a capacitor having a first electrode to which the voltage is applied; a first amplifier having a first input terminal, connected to a second electrode of the capacitor, and a second input terminal, to which a first reference voltage is applied to, to output a result by comparing the voltage with the first reference voltage; a switch unit controlling a connection between the output of the first amplifier and the first input terminal; and a second amplifier having a third input terminal, to which the output of the first amplifier is connected, and a fourth input terminal, to which a second reference voltage is applied, to output a result by comparing the voltage with the second reference voltage, in which a first gain of the first amplifier is lower than a second gain of the second amplifier.

A large area, gapless, detection system comprises at least one sensor; an interposer operably connected to the at least one sensor; and at least one application specific integrated circuit operably connected to the sensor via the interposer wherein the detection system provides high dynamic range while maintaining small pixel area and low power dissipation. Thereby the invention provides methods and systems for a wafer-scale gapless and seamless detector systems with small pixels, which have both high dynamic range and low power dissipation.

An aircraft imaging system for night and day imaging at ranges up to and in excess of 100 km with resolution far exceeding the diffraction limit. In a preferred embodiment two separate techniques are utilized on an aircraft to provide for night and day surveillance. The first technique is to provide a multi-aperture active imaging system for daylight imaging. The second technique is to provide a multi-aperture passive imaging system for day and night imaging. In preferred embodiments both techniques are utilized on the aircraft.

An apparatus having a rectangular imaging array characterized by a plurality of pixel sensors and a plurality of readout lines is disclosed. The apparatus has a plurality of column processing circuits, each column processing circuit being connected to a corresponding one of the readout lines and a plurality of signal injectors, one signal injector being connected to each of the readout lines. Each signal injector causes one of a predetermined number of voltages to be coupled to that readout line. An exposure for each of the pixel sensors is determined during image recording periods. The signal injectors inject a plurality of calibration voltages into the readout lines during calibration periods, and determines a gain function of an amplifier in one of the column processing circuits by measuring an output of the amplifier for the plurality of calibration voltages, the calibration period is between the imaging recording periods.