Solid-state imaging elements are disclosed. In one example, an upstream circuit block generates a predetermined reset level and a plurality of signal levels each corresponding to an exposure amount, and causes capacitive elements, different from each other, to hold them. A selection circuit sequentially performs control to connect the capacitive element in which the reset level is held to a predetermined downstream node, control to disconnect capacitive elements from the downstream node, and control to connect the capacitive element in which any of the plurality of signal levels is held to the downstream node. A downstream reset transistor initializes a level of the downstream node when the capacitive elements are disconnected from the downstream node. A downstream circuit sequentially reads the reset level and the plurality of signal levels via the downstream node

A photodetection device according to the present disclosure includes: a pixel; a reference signal generation unit; a comparison circuit; and a first switch. The pixel is configured to generate a pixel signal. The reference signal generation unit is configured to generate a reference signal. The comparison circuit includes a first-stage amplifier circuit and a second-stage amplifier circuit that is coupled to the first-stage amplifier circuit through a connection node. The first-stage amplifier circuit is configured to output a first output signal corresponding to a comparison operation based on the pixel signal and the reference signal. The second-stage amplifier circuit is configured to output a second output signal corresponding to the first output signal outputted from the first-stage amplifier circuit through the connection node. The first switch has one end and another end. The one end is coupled to the connection node. The first switch allows impedance and a voltage at the connection node to change.

A photodetection device according to the present disclosure includes: a pixel; a reference signal generation unit; a comparison circuit; and a first switch. The pixel is configured to generate a pixel signal. The reference signal generation unit is configured to generate a reference signal. The comparison circuit includes a first-stage amplifier circuit and a second-stage amplifier circuit that is coupled to the first-stage amplifier circuit through a connection node. The first-stage amplifier circuit is configured to output a first output signal corresponding to a comparison operation based on the pixel signal and the reference signal. The second-stage amplifier circuit is configured to output a second output signal corresponding to the first output signal outputted from the first-stage amplifier circuit through the connection node. The first switch has one end and another end. The one end is coupled to the connection node. The first switch allows impedance and a voltage at the connection node to change.

A method of temperature compensation in an optical-fingerprint detection system includes acquiring a first reading associated with one or more pixels of an array. The first reading is a baseline reading. The method further includes acquiring a second reading associated with the one or more pixels of the array. The second reading includes the baseline plus a signal. Producing a temperature compensated signal reading by subtracting the first reading from the second reading. The array is an optical-fingerprint array, and each pixel of the array is coupled to a readout circuit via a pixel switch. The method includes row-based and frame-based schemes and a blind pixel scheme. Readout circuit improvements including multiplexed analog front-end (AFE), charge magnifier with column charge offset compensation and a low-noise gate driver circuit are provided.

A method of temperature compensation in an optical-fingerprint detection system includes acquiring a first reading associated with one or more pixels of an array. The first reading is a baseline reading. The method further includes acquiring a second reading associated with the one or more pixels of the array. The second reading includes the baseline plus a signal. Producing a temperature compensated signal reading by subtracting the first reading from the second reading. The array is an optical-fingerprint array, and each pixel of the array is coupled to a readout circuit via a pixel switch. The method includes row-based and frame-based schemes and a blind pixel scheme. Readout circuit improvements including multiplexed analog front-end (AFE), charge magnifier with column charge offset compensation and a low-noise gate driver circuit are provided.

The present technology relates to an imaging element that can reduce noise. The imaging element includes: a photoelectric conversion element; a first amplification element that amplifies a signal from the photoelectric conversion element; a second amplification element that amplifies an output from the first amplification element; an offset element provided between the first amplification element and the second amplification element; a first reset element that resets the first amplification element; and a second reset element that resets the second amplification element. The offset element is a capacitor. A charge is accumulated in the offset element via a feedback loop of an output from the second amplification element, and an offset bias is generated. The present technology can be applied to an imaging element.

A photoelectric conversion device of the present disclosure includes: a scanning unit; a first storage unit that stores a first setting value representing a setting of a first scan in response to an input from the outside; and a second storage unit that stores a second setting value representing a setting of a second scan in response to an input from the outside, wherein the scanning unit performs the first scan based on the first setting value and the second scan based on the second setting value in one frame period, and wherein both storing of the first setting value in the first storage unit and storing of the second setting value by the second storage unit are performed prior to a start of the first scan and a start of the second scan.

An image sensor includes unit pixels of a first pixel group sharing a first floating diffusion region and associated with a single color filter, and unit pixels of a second pixel group sharing a second floating diffusion region and associated with the single color filter. Control logic may generate an image by obtaining capacitance having a first value from the first floating diffusion region at a first time, and obtaining capacitance having a second value different from the first value from the second floating diffusion region at a second time following the first time. The first pixel group and the second pixel s group have different sensitivity levels.

A method of reading a pixel value from an image sensor housed with a set of components includes determining a current state of the set of components; adjusting, at least partly responsive to the current state of the set of components, a correlated double sampling (CDS) time; and performing, in accordance with the adjusted CDS time, a CDS readout of at least one pixel in a pixel array of the image sensor.

A semiconductor device with a small circuit scale is provided. The semiconductor device includes a first circuit and a second circuit. The first circuit includes first to n-th (n is an integer of 2 or more) transistors and the second circuit includes (n+1)-th to 2n-th transistors. The first to n-th transistors are connected in parallel to each other and the (n+1)-th to 2n-th transistors are connected in series to each other. First to n-th signals are supplied to the first circuit and the second circuit. The first circuit has a function of outputting a first potential when each of potentials of the first to n-th signals is lower than or equal to a first reference potential, and outputting a second potential when at least one of the potentials of the first to n-th signals is higher than the first reference potential. The second circuit has a function of outputting a third potential when each of the potentials of the first to n-th signals is higher than a second reference potential, and outputting the first potential when at least one of the potentials of the first to n-th signals is lower than or equal to the second reference potential.