A wiring board includes a first interconnect structure including a first interconnect layer, and a first insulating layer including a non-photosensitive thermosetting resin as a main component thereof, a second interconnect structure including second interconnect layers, and second insulating layers including a photosensitive resin as a main component thereof, and laminated on the first interconnect structure, and an encapsulating resin layer including a non-photosensitive thermosetting resin as a main component thereof, and laminated on an uppermost second insulating layer. An uppermost second interconnect layer includes a pad protruding from the uppermost second insulating layer. The encapsulating resin layer exposes a top surface of the pad, and covers at least a portion of a side surface of the pad. Thermal expansion coefficients of the first insulating layer and the encapsulating resin layer are lower than that of the second insulating layers.

A suspension board with circuit extending in a predetermined direction includes a base insulating layer, and a conductive layer disposed on one side in a thickness direction of the base insulating layer. The base insulating layer includes a first body base and a second body base disposed spaced apart from each other in a width direction, and a connection portion connecting a portion of the first body base in the longitudinal direction to a portion of the second body base in the longitudinal direction. The suspension board with circuit further includes a reinforcing portion disposed on the surface of the connection portion and reinforcing the connection portion. The reinforcing portion includes two or more resin layers laminated in the thickness direction, or a metal member.

An electronic device includes a substrate having a surface, functional metallic traces on a first portion of the surface that are electrically connected to carry current in the electronic device and have a first density, and dummy metallic traces on a second portion of the surface that are electrically isolated from the functional metallic traces and have a second density that is within at least 50% of the first density.

It is desirable to improve a longevity and reliability of a substrate used within an IC package. By modifying a design of the one or more layout masks used to create planes within a substrate, the resulting planes may have a non-straight pattern on the edges of each plane and may include a predetermined pattern of open spaces filled with dielectric materials in each plane. The improved mechanical strength of the patterned planes can effectively compensate the effect of mismatched thermal expansion during IC testing and deployment, resulting in increased durability and longevity of the package substrates.

A power module including at least one substrate, a housing arranged on the at least one power substrate, a first terminal electrically connected to the at least one power substrate, a second terminal including a contact surface, a third terminal electrically connected to the at least one power substrate, a plurality of power devices arranged on and connected to the at least one power substrate, and the third terminal being electrically connected to at least one of the plurality of power devices. The power module further including a base plate and a plurality of pin fins arranged on the base plate and the plurality of pin fins configured to provide direct cooling for the power module.

A component carrier includes a stack with at least one electrically conductive layer structure and at least one electrically insulating layer structure. At least one electrically insulating layer structure has at least partly tapering through holes filled substantially completely with an electrically conductive filling. The at least one electrically conductive layer structure and the electrically conductive filling are made of the same material. In addition, different ones of the through holes of one electrically insulating layer structure are tapering in opposite directions.

A device component assembly including an upper support plate (USP) of glass and a lower support plate (LSP) of metal affixed to the USP, and a manufacturing method are provided. The USP and the LSP include openings of different shapes and sizes. The LSP includes gaps cut in different directions for reducing thermal expansion and tension generated during a temperature shift. Device components including optical, mechanical, electric, electronic, and optoelectronic components are mutually optically aligned and mounted on the USP and/or the LSP based on component requirements. The device components are mounted on the LSP through the openings of the USP. The optical components are affixed to the support plate(s) using a fastening material. One or more heat transfer members are affixed to the LSP for mounting the device component(s) thereon, after mutual optical alignment therebetween. The device component assembly is integrated in an optical or optoelectronic module or system.

A welding quality processing method and device, and a circuit board. The method includes: obtaining warpage data of each circuit board layer in a multi-layer circuit board under a preset welding temperature change curve; performing simulation according to a stacked state of the multi-layer circuit board and the warpage data to generate a warpage level of each region in the multi-layer circuit board in the stacked state; and processing the multi-layer circuit board according to the warpage level.

A circuit board according to the present disclosure includes a substrate that is composed of a ceramic(s), and an electrically conductive layer that is positioned in contact with the substrate. The substrate includes a groove around the electrically conductive layer. Furthermore, an electronic device according to the present disclosure includes a circuit board with a configuration as described above, and an electronic component that is positioned on the electrically conductive layer.

A wiring board includes a substrate and a plurality of monolithic ceramic capacitors connected in series on the substrate. The plurality of monolithic ceramic capacitors includes a first monolithic ceramic capacitor oriented in a first direction and a second monolithic ceramic capacitor oriented in a second direction. The second direction is at an angle of 45±5 degrees relative to the first direction.