An electronic device includes a substrate and a flexible printed circuit board. The substrate includes a plurality of first pins disposed on the substrate. The flexible printed circuit board includes a plurality of second pins disposed on the flexible printed circuit board. The first pins and the second pins are bonded to each other to form a plurality of bonding points. The bonding points include at least one central bonding point and at least one first bonding point. The at least one central bonding point is located in a central area of the electronic device. The at least one first bonding point is located in a first area of the electronic device. The first area is located outside the central area. A line width of the at least one first bonding point is greater than a line width of the at least one central bonding point.

A module includes discontinuities, such as openings or slots, between regions of a conductive shield that correspond to circuits on a substrate. The discontinuities are provided to perturb current flow between the regions to reduce coupling between the circuits. The circuits may be transmit (TX) circuits and receive (RX) circuits, including acoustic filters on a printed circuit board.

A method for fabricating a conductive trace structure includes the steps: forming a first metal layer on a non-conductive substrate; removing a part of the first metal layer to expose the non-conductive substrate so as to form the first metal layer into a plating region and a non-plating region, the plating region being divided into at least two trace-forming portions and at least one bridge portion; forming a second metal layer on the plating region by electroplating the plating region using one of the trace-forming portions and the bridge portion as an electrode; and removing the bridge portion and the second metal layer formed on the bridge portion.

A sealing structure is provided. The sealing structure includes two substrates opposite each other, each of which has a sealing region on its periphery. The sealing structure further includes a recess structure having at least one recess in the sealing region of at least one of the two substrates. The sealing structure further includes a sealing material with filler particles, which is disposed along the sealing regions to seal the two substrates, wherein a portion of the filler particles are accommodated in the at least one recess.

A printed circuit board according to an embodiment comprises: an insulating layer; a circuit pattern disposed on the upper surface of the insulating layer; a support layer which is disposed on the upper surface of the insulating layer to expose the upper surface of the circuit pattern and is in contact with the sides of the circuit pattern; and a protective layer disposed on the upper surfaces of the support layer and the circuit pattern, wherein the upper region of the insulating layer comprises a first region and a second region, and the protective layer comprises an open region exposing the upper surfaces of the support layer and the circuit pattern that are disposed in the first region, and the support layer comprises a first upper surface positioned at the highest level among the upper surfaces of the support layer and a second upper surface positioned at the lowest level among the upper surfaces of the support layer, the second upper surface being lower than the first upper surface, and the protective layer comprises a first portion which contacts the upper surface of the circuit pattern of the first region and a second portion which contacts the upper surface of the support layer of the first region, and the second portion of the protective layer contacts the second upper surface of the support layer and includes a first lower surface which is lower than the upper surface of the circuit pattern.

A circuit board according to an embodiment includes an insulating layer; and a lead pattern portion disposed on the insulating layer, wherein the lead pattern portion includes: a first portion disposed on the insulating layer; and a second portion extending from one end of the first portion; wherein the first portion is disposed overlapping the insulating layer in a vertical direction, wherein the second portion is disposed in an outer region of the insulating layer and does not overlap the insulating layer; and wherein the lead pattern portion has a centerline average roughness in a range of 0.05 .Math.m to 0.5 .Math.m or a 10-point average roughness in a range of 1.0 .Math.m to 5.0 .Math.m.

A method for manufacturing a component carrier includes covering a dielectric layer structure by a metal foil, forming an electroless metal layer on the metal foil, and forming a multi-stage electroplating structure on the electroless metal layer. A component carrier made by the method is further described.

An elongated wired circuit board including a plurality of wires arranged in parallel, wherein the plurality of wires each includes a first linear portion extending in a first linear direction, a second linear portion extending in a second linear direction, and a connection portion, the connection portion includes a first side, a second side, a third side, and a fourth side, length y1 and length S satisfy 0<y1<S, length y1 extending from the first corner portion reaching the first widthwise other end edge of the first linear portion, and length S extending from the first widthwise other end edge of the first linear portion of one wire, and the predetermined angle θ satisfies 0<θ<1 deg.

An electrical contact assembly that uses an elastomer strip for each row of individual contacts. Each contact comprises a rigid bottom pin and a flexible top pin with a pair of arms which extend over and slide along sloped surfaces of the bottom contact. The elastomer strip is located between rows of the bottom and top pins. A bottom socket housing is provided with grooves which receive each elastomer strip. A row of top pins is then placed over each elastomer strip, and through ducts in the bottom socket housing. Bottom pins are then snapped into place in between the pair of arms.

A device and associated PCB structure are provided in which a dedicated area of the device substrate is patterned, so that it can be contacted by a readout arrangement of the PCB. The pattern comprises an arrangement of contact regions. Interconnections and open circuits are used to encode information. A dotted contact area of the PCB is used to probe the pattern, and relay this to a driver which can then derive information about the type of device being driven. The driver can thus be controlled accordingly.