H05K1/11

ELECTRONIC DEVICE
20230224394 · 2023-07-13 ·

An electronic device includes a middle frame, a first flexible printed circuit FPC, a second FPC and a battery. Projections of the first FPC and the second FPC on the middle frame have a first overlapping region. The first overlapping region is located inside a projection of the battery on the middle frame and is far away from an edge of the battery. A first through hole is disposed on the middle frame. The first overlapping region is located in the first through hole. The electronic device provided in this application can implement reduction of an overall thickness, so that the electronic device provides better user experience.

SEMICONDUCTOR DEVICE WITH A MULTILAYER PACKAGE SUBSTRATE

A semiconductor device includes a die having an input port and an output port. The semiconductor device also includes a multilayer package substrate with pads on a surface of the multilayer package substrate configured to be coupled to circuit components of a printed circuit board. The multilayer package substrate also includes a passive filter comprising an input port and an output port, and a planar inductor. The planar inductor is coupled to a given pad of the pads of the multilayer package substrate with a first via of the multilayer package substrate and to the input port of the die with a second via of the multilayer package substrate. The planar inductor extends parallel to the surface of the multilayer package substrate.

CIRCUIT BOARD ENHANCING STRUCTURE AND MANUFACTURE METHOD THEREOF
20230012572 · 2023-01-19 ·

The invention discloses a circuit board enhancing structure and a manufacture method thereof. The method includes the following steps: providing a substrate; forming a first circuit on the substrate; forming a first dielectric layer enclosing the first circuit on the substrate; forming a first opening on the first dielectric layer; forming a first pattern photoresist layer on the first dielectric layer to divide a surface of the first dielectric layer as a first structure enhancing area and a second circuit area, wherein the first opening is disposed in the first structure enhancing area; forming a second circuit in the second circuit area and a first enhancing structure in the first opening, wherein the first enhancing structure protrudes from the first opening; removing the first pattern photoresist layer; and forming a second dielectric layer enclosing the second circuit and the first enhancing structure on the first dielectric layer.

ARRAYS FOR QUANTUM WAVEFUNCTION MANIPULATION
20230015084 · 2023-01-19 · ·

A quantum phased array comprising one or more arrays of emitter elements each emitting one or more particles having one or more quantum wavefunctions; one or more a phase shifting elements coupled to the emitter elements, each of the phase shifting elements comprising a source of a vector potential applying one or more phase shifts to the one or more quantum wavefunctions; and a control circuit coupled to the one or more phase shifting elements, the control circuit configuring the one or more vector potentials to control an interference of the quantum wavefunctions forming a distribution of the one or more particles at a target, and wherein the distribution is described by a wavefunction interference pattern resulting from the interference controlled by the vector potentials.

PRINTED CIRCUIT BOARD AND STORAGE DEVICE INCLUDING THE SAME
20230014935 · 2023-01-19 · ·

A printed circuit board, in which two or more copper clad laminates (CCLs) are laminated vertically from an uppermost circuit layer to a lowermost circuit layer, includes a non-destructive testing area, mislamination identifying portions in the non-destructive testing area, the mislamination identifying portions being in the CCLs, respectively, through-via holes vertically exposing the mislamination identifying portions, respectively, in the non-destructive testing area, the through-via holes being spaced apart from each other by a first interval, and a probe via extending vertically and being in contact with an end portion of each of the mislamination identifying portions on a same side. A length of the mislamination identifying portion in an N-th (N is an integer of 1 to K) layer CCL in a horizontal direction is longer than a length of the mislamination identifying positioned in an (N-1)-th layer CCL in the horizontal direction.

DISPLAY DEVICE WITH TOUCH PANEL HAVING X, Y AND DUMMY ELECTRODES
20230221817 · 2023-07-13 ·

A display device includes a display panel, and an electrostatic capacitive type touch panel which is formed in an overlapping manner with the display panel. A plurality of X electrodes and a plurality of Y electrodes intersecting with the X electrodes. A first signal line supplies signals to the X electrodes, a second signal line supplies signals to the Y electrodes, and the first signal line and the second signal line are formed on a flexible printed circuit board. A dummy electrode is formed adjacent to an electrode portion of each X electrode and electrode portion of each Y electrode, the dummy electrode does not overlap the X electrode and the Y electrode, and the dummy electrode does not electrically connect with the first and second signal lines.

Systems and methods for thermal control of a generator control unit

A generator control unit (GCU) having thermal control includes a GCU housing having a first side and a second side. A printed wiring board (PWB) is within the GCU housing between the first side and the second side. The PWB includes a component side that faces a first side of the GCU housing. At least one through via is positioned through a thickness of the PWB. At least one boss is positioned on the component side of the PWB. The at least one boss extends from a component of the PWB to the first side of the GCU housing.

FLEXIBLE CIRCUIT BOARD, COF MODULE, AND ELECTRONIC DEVICE COMPRISING THE SAME
20230225048 · 2023-07-13 ·

A flexible circuit board comprises a substrate on which a chip mounting area is defined, a circuit pattern disposed on the substrate, and a protective layer on the circuit pattern, and the circuit pattern includes a plurality of first circuit patterns, a plurality of second circuit patterns, and a plurality of dummy patterns, and the first circuit pattern includes a first pad part, a second pad part, and a first wiring part connected to the first pad part and the second pad part, and the second circuit pattern includes a third pad part, a fourth pad part, and a second wiring part connected to the third pad part and the fourth pad part, and a through hole is disposed in an inner region of the first circuit pattern.

ELECTRONIC MODULE, INTERMEDIATE CONNECTION MEMBER, AND ELECTRONIC DEVICE
20230223713 · 2023-07-13 ·

An electronic module includes a first wiring board, a second wiring board, and an intermediate connection member. The intermediate connection member includes an insulator, a plurality of first wirings supported by the insulator and arranged at intervals in a second direction intersecting a first direction, a plurality of second wirings supported by the insulator and arranged at intervals in the second direction, and a metal layer supported by the insulator and interposed between the plurality of first wirings and the plurality of second wirings so as to oppose the plurality of first wirings and the plurality of second wirings in a third direction intersecting the first direction and the second direction. A part of the metal layer sandwiched in the insulator is bonded to one of the first wiring board or the second wiring board by a conductive first bonding member.

CONNECTION STRUCTURE AND ELECTRONIC DEVICE
20230225052 · 2023-07-13 ·

A connection structure is provided. The connection structure includes a first conductive pad, a first insulating layer, a second conductive pad, a second insulating layer, and a third conductive pad. The first insulating layer is disposed on the first conductive pad and includes a first through-hole. The second conductive pad is disposed on the first insulating layer and electrically connected to the first conductive pad through the first through-hole. The second insulating layer is disposed on the second conductive pad and includes a second through-hole and a first recessed portion. The first recessed portion overlaps the first through-hole. The third conductive pad is disposed on the second insulating layer and electrically connected to the second conductive pad through the second through-hole. The third conductive pad extends on a surface of the first recessed portion.