A manufacturing method of a circuit board includes: providing a first double-sided copper laminate including a dielectric layer, a first copper foil layer and a copper plating layer wherein the dielectric layer, wherein the dielectric layer defines a groove, the copper plating layer includes a first copper plating portion in the groove and a second copper plating portion beside the first copper plating portion. A double-sided circuit substrate including base layer and two first wiring layers is provided, wherein each first wiring layer includes a signal line. Conductive paste blocks are disposed in the base layer and on both sides of the signal line; and a first double-sided copper laminate is stacked on each side of the double-sided circuit substrate, disposing the signal line in the groove. The conductive paste blocks are pressed electrically connect same to the second copper plating portions. The present disclosure further provides a circuit board.

An object of the present invention is to decrease the resistance of a power supply line, to suppress a voltage drop in the power supply line, and to prevent defective display. A connection terminal portion includes a plurality of connection terminals. The plurality of connection terminals is provided with a plurality of connection pads which is part of the connection terminal. The plurality of connection pads includes a first connection pad and a second connection pad having a line width different from that of the first connection pad. Pitches between the plurality of connection pads are equal to each other.

A first microchip includes holes or sockets along or in a top face or surface of the first microchip and a second microchip includes nodules extending from a edge of the second microchip. The nodules of the second microchip are received in the holes or sockets along or in the top face or surface of the first microchip, whereupon the first and second microchips are positioned transverse or perpendicular to each other.

Disclosed is an electronic device comprising a first component, a second component, and a signal path interface coupled between the first component and the second component, the signal path interface including a printed circuit board (PCB) having a rigid PCB portion and a flexible PCB portion, wherein a first signal line and a second signal line extend through the rigid PCB portion and the flexible PCB portion for transmitting signals from the first component to the second components, and a plurality of ground lines extend through the rigid PCB portion and the flexible PCB portion, and wherein each of the plurality of ground lines extending through the rigid PCB portion is connected to one or more conductive layers through conductive vias.

A substrate for mounting electronic element includes: a first substrate including a first surface and a second surface opposite to the first surface; a second substrate including a third surface and a fourth surface opposite to the third surface; and heat dissipation bodies each including a fifth surface and a sixth surface opposite to the fifth surface. The first substrate includes at least one mounting portion for at least one electronic element at the first surface. Heat conduction of the heat dissipation bodies in a direction perpendicular to a longitudinal direction of the at least one mounting portion and perpendicular to a direction along opposite sides of the second substrate is greater than heat conduction of the heat dissipation bodies in the longitudinal direction of the at least one mounting portion and in the direction along opposite sides of the second substrate in a transparent plan view of the substrate.

A substrate for mounting electronic element includes: a first substrate including a first surface and a second surface opposite to the first surface; a second substrate including a third surface and a fourth surface opposite to the third surface; and heat dissipation bodies each including a fifth surface and a sixth surface opposite to the fifth surface. The first substrate includes at least one mounting portion for at least one electronic element at the first surface. Heat conduction of the heat dissipation bodies in a direction perpendicular to a longitudinal direction of the at least one mounting portion and perpendicular to a direction along opposite sides of the second substrate is greater than heat conduction of the heat dissipation bodies in the longitudinal direction of the at least one mounting portion and in the direction along opposite sides of the second substrate in a transparent plan view of the substrate.

A method may include obtaining a printed circuit board (PCB) that includes a set of vias that include a set of stub regions. The PCB may include a set of layers perpendicular to the set of vias. The set of layers may include a signal layer and a ground layer. The ground layer may be located between the set of stub regions and the signal layer. The method may include drilling to remove at least a portion of a stub region of a via of the set of vias. The method may include performing an electrical test to determine whether a sliver of conductive material is included within the via after drilling to remove the at least a portion of the stub region of the via.

A wiring board includes a first interconnect structure including a first interconnect layer, and a first insulating layer including a non-photosensitive thermosetting resin as a main component thereof, a second interconnect structure including second interconnect layers, and second insulating layers including a photosensitive resin as a main component thereof, and laminated on the first interconnect structure, and an encapsulating resin layer including a non-photosensitive thermosetting resin as a main component thereof, and laminated on an uppermost second insulating layer. An uppermost second interconnect layer includes a pad protruding from the uppermost second insulating layer. The encapsulating resin layer exposes a top surface of the pad, and covers at least a portion of a side surface of the pad. Thermal expansion coefficients of the first insulating layer and the encapsulating resin layer are lower than that of the second insulating layers.

A mounted structure of a supporting-terminal-equipped capacitor chip includes first and second supporting terminals. The first supporting terminal includes a first helical electrically conductive portion extending in a first axial direction along a main surface. The second supporting terminal includes a second helical electrically conductive portion extending in a second axial direction along the main surface. The first helical electrically conductive portion is electrically connected to a first outer electrode at an outer peripheral side surface of the first helical electrically conductive portion. The second helical electrically conductive portion is electrically connected to a second outer electrode at an outer peripheral side surface of the second helical electrically conductive portion.

A printed wiring board includes an insulating layer, and a conductor layer including a solid layer and wirings. The solid layer has an opening part. The wirings are formed in the opening part. The opening part includes first and second opening parts. The wirings include first and second wirings. The first wiring has a first land, a first portion, and a second portion. The second wiring has a second land, a third portion, and a fourth portion extending in parallel to the second portion. A first boundary between the first and second portions is in the second opening part. The first portion is bending at the first boundary and increasing distance between the first and second wirings. A second boundary between the third and fourth portions is in the second opening part. The third portion is bending at the second boundary and increasing distance between the first and second wirings.