The technology disclosed relates to accommodating embedded substrates during direct writing onto a printed circuit board and to other patterning problems that benefit from an extended depth of focus. In particular, it relates to multi-focus direct writing of a workpiece by the continuous or step-wise movement of the workpiece during the sequence of exposures having different focus planes. In one implementation, a multi-arm rotating direct writer is configured for interleaved writing focused on two or more focal planes that generally correspond to two or more surface heights of a radiation sensitive layer that overlays the uneven workpiece. Alternating arms can produce interleaved writing to the two or more focal planes.

A multi-layer substrate structure which can be peeled off precisely includes: a substrate; a first flexible dielectric layer formed on the substrate; a peel-off layer formed on the first flexible dielectric layer; and a unit to be peeled off formed on the peel-off layer; wherein an adhesive force between the peel-off layer and the first flexible dielectric layer is smaller than an adhesive force between the first flexible dielectric layer and the substrate, and the substrate, the first flexible dielectric layer, the peel-off layer, and the unit to be peeled off together form the multi-layer substrate structure. A method for manufacturing a multi-layer substrate structure which can be peeled off precisely is also provided.

Various embodiments described herein provide for printed circuit boards with one or more spaces for embedding components, which can be used to implement a memory sub-system.

A method for manufacturing a circuit board with nickel resistor embedded therein provides a copper substrate, the copper substrate includes a copper foil. A nickel resistance layer is formed on the copper foil. A first dielectric layer and a first copper layer are formed on the nickel resistance layer. The copper foil and the first copper layer are etched to form a first conductive wiring layer and a second conductive wiring layer respectively, the nickel layer not being subjected to an etching process, to obtain the finished circuit board.

A wiring board for a built-in electronic component includes a first insulating layer, a second insulating layer formed under the first insulating layer, and a conductor layer formed on an upper surface of the second insulating layer such that a cavity is formed to penetrate through the first insulating layer and the conductor layer and expose the second insulating layer at a bottom of the cavity and is formed to accommodate an electronic component therein. The first insulating layer and the conductor layer are formed such that the cavity has a first inner side surface extending from an upper opening edge to a position closer to the second insulating layer, and a lateral expansion part formed between a lower edge of the first inner side surface and the second insulating layer and extending outward from the lower edge of the first inner side surface.

A flexible printed circuit board includes a base layer and a pattern line. At least one communication hole penetrating opposite surfaces of the base layer. The pattern line includes two conductive circuit layers formed on the opposite surfaces of the base layer. At least one conductive pole are formed in the at least one communication hole and electrically connects the two conductive circuit layers. A gap being is formed between the conductive pole and the base layer.

This application relates to the field of power supply packaging technologies, and in particular, to a PCB-pinout based packaged module, including a packaged module and a pin exposed outside the packaged module. The packaged module includes a PCB and a power component. The PCB has a first surface and a second surface that are disposed opposite to each other, and the power component is disposed on the first surface or the second surface of the PCB. The power component performs communication connection with a pin located on one side of the first surface or one side of the second surface of the PCB through surface-layer copper of the PCB. The pin located on one side of the first surface or one side of the second surface of the PCB is a surface-layer copper etching pattern that is located on the PCB and that is exposed outside the packaged module.

A printed circuit board according to an embodiment includes a first insulating layer; a second insulating layer disposed on the first insulating layer and including a cavity; and a pad disposed on the first insulating layer and exposed through the cavity; wherein the second insulating layer includes a first portion disposed on an upper surface of the first insulating layer in a region where the cavity is formed; and a second portion other than the first portion, and wherein a thickness of the first portion is smaller than a thickness of the second portion.

An electronic device and a method for manufacturing the same are disclosed. The method for manufacturing the electronic device includes the following steps: providing a substrate; forming a metal layer on the substrate, wherein the metal layer has a first surface; forming a first insulating layer on the first surface of the metal layer; forming a second insulating layer on the first insulating layer; etching the first insulating layer and the second insulating layer to form a contact hole, wherein the contact hole exposes a portion of the first surface; cleaning the portion of the first surface exposed by the contact hole with a solution; and forming a transparent conductive layer on the second insulating layer, wherein the transparent conductive layer electrically connects with the metal layer.

Embodiments may relate to a microelectronic package with an interconnect stack that includes a cavity therein. The cavity may include a dielectric material with a dielectric value less than 3.9. The microelectronic package may further include first and second conductive elements in the cavity, with the dielectric material positioned therebetween. Other embodiments may be described or claimed.