A flake-less molecular ink suitable for printing (e.g. screen printing) conductive traces on a substrate has 30-60 wt % of a C.sub.8-C.sub.12 silver carboxylate or 5-75 wt % of bis(2-ethyl-1-hexylamine) copper (II) formate, bis(octylamine) copper (II) formate or tris(octylamine) copper (II) formate, 0.1-10 wt % of a polymeric binder (e.g. ethyl cellulose) and balance of at least one organic solvent. Conductive traces formed with the molecular ink are thinner, have lower resistivity, have greater adhesion to a substrate than metal flake inks, have better print resolution and are up to 8 times less rough than metal flake inks. In addition, the shear force required to remove light emitting diodes bonded to the traces using Loctite 3880 is at least 1.3 times stronger than for commercially available flake-based inks.

Provided are a laminate including a silver layer on a substrate, in which the silver layer includes a surface in which Kurtosis of a roughness curve satisfies at least one of Condition (i) the change rate of Kurtosis is greater than or equal to 50% under conditions of a temperature of 85 C. and a relative humidity of 85% after 240 hours have elapsed and Condition (ii) the change rate of Kurtosis is greater than or equal to 200% under conditions of a temperature of 85 C. and a relative humidity of 85% after 480 hours have elapsed, and a circuit board in which an electronic component is mounted on the surface of the laminate through a conductive joint portion.

Low temperature processes for converting mixtures of metal inks into alloys. The alloys can be dealloyed by etching. A method comprising: depositing at least one precursor composition on at least one substrate to form at least one deposited structure, wherein the precursor composition comprises at least two metal complexes, including at least one first metal complex comprising at least one first metal and at least one second metal complex different from the first metal complex and comprising at least one second metal different from the first metal, treating the deposited structure so that the first metal and the second metal become elemental forms of the first metal and the second metal in a treated structure. Further, one can remove at least some of the first metal to leave a nanoporous material comprising at least the second metal. Precursor compositions can be formulated to be homogeneous compositions.

A single-layer circuit board, multi-layer circuit board, and manufacturing methods therefor. The method for manufacturing the single-layer circuit board comprises the following steps: drilling a hole on a substrate, the hole comprising a blind hole and/or a through hole; on a surface of the substrate, forming a photoresist layer having a circuit negative image; forming a conductive seed layer on the surface of the substrate and a hole wall of the hole; removing the photoresist layer, and forming a circuit pattern on the surface of the substrate, wherein forming a conductive seed layer comprises implanting a conductive material below the surface of the substrate and below the hole wall of the hole via ion implantation, and forming an ion implantation layer as at least part of the conductive seed layer.

A single-layer circuit board, multi-layer circuit board, and manufacturing methods therefor. The method for manufacturing the single-layer circuit board comprises the following steps: drilling a hole on a substrate, the hole comprising a blind hole and/or a through hole; on a surface of the substrate, forming a photoresist layer having a circuit negative image; forming a conductive seed layer on the surface of the substrate and a hole wall of the hole; removing the photoresist layer, and forming a circuit pattern on the surface of the substrate, wherein forming a conductive seed layer comprises implanting a conductive material below the surface of the substrate and below the hole wall of the hole via ion implantation, and forming an ion implantation layer as at least part of the conductive seed layer.

This invention forms a multilayer substrate by one apparatus. A multilayer substrate forming method includes fixing a substrate on a stage, forming, on the substrate fixed on the stage, a layer of a mixed material obtained by mixing a conductive material and a photo-curing resin, performing exposure by scanning a laser beam according to first circuit pattern data prepared in advance on the layer of the mixed material, washing away the mixed material on the substrate after the exposure in the performing exposure by scanning the laser beam according to the first circuit pattern data, forming a layer of an insulating resin on the substrate after the cleaning in the washing away the mixed material on the substrate after the exposure in the performing exposure by scanning the laser beam according to the first circuit pattern data, performing exposure by scanning a laser beam according to through hole data prepared in advance on the layer of the insulating resin, washing away the insulating resin on the substrate after the exposure in the performing exposure by scanning the laser beam according to the through hole data, forming a layer of the mixed material on the substrate after the cleaning in the washing away the insulating resin, performing exposure by scanning a laser beam according to second circuit pattern data prepared in advance on the layer of the mixed material, and washing away the mixed material on the substrate after the exposure in the performing exposure by scanning the laser beam according to the second circuit pattern data.

A ceramic circuit board and a method of making are provided. The ceramic circuit board includes a substrate and a composite material layer. The composite material layer is formed on the substrate and comprises metal oxide powders and ceramic powders. The composite material layer has an interface layer which is transformed from the metal oxide powders by reduction and includes comprises zero-valent metal, lower-valent metal oxide and eutectic mixture reduced from the metal oxide powders of the composite material layer.

A single-layer circuit board, multi-layer circuit board, and manufacturing methods therefor. The method for manufacturing the single-layer circuit board (10) comprises the following steps: drilling a hole on a substrate (11), the hole comprising a blind hole and/or a through hole (S1); on a surface (12) of the substrate, forming a photoresist layer having a circuit negative image (S2); forming a conductive seed layer on the surface (12) of the substrate and a hole wall (19) of the hole (S3); removing the photoresist layer, and forming a circuit pattern on the surface (12) of the substrate (S4), wherein Step S3 comprises implanting a conductive material below the surface (12) of the substrate and below the hole wall (19) of the hole via ion implantation, and forming an ion implantation layer as at least part of the conductive seed layer.

A single-layer circuit board, multi-layer circuit board, and manufacturing methods therefor. The method for manufacturing the single-layer circuit board (10) comprises the following steps: drilling a hole on a substrate (11), the hole comprising a blind hole and/or a through hole (S1); on a surface (12) of the substrate, forming a photoresist layer having a circuit negative image (S2); forming a conductive seed layer on the surface (12) of the substrate and a hole wall (19) of the hole (S3); removing the photoresist layer, and forming a circuit pattern on the surface (12) of the substrate (S4), wherein Step S3 comprises implanting a conductive material below the surface (12) of the substrate and below the hole wall (19) of the hole via ion implantation, and forming an ion implantation layer as at least part of the conductive seed layer.

Graphene oxide is used as an insulation barrier layer for metal deposition. After patterning and modification, the chemical characteristics of graphene oxide are induced. It can be used as the catalyst for electroless plating in the metallization process, so that the metal is only deposited on the patterned area. It provides the advantages of improving reliability and yield. The metallization structure includes a substrate, a graphene oxide catalytic layer, and a metal layer. It may be widely applied to the metallization of the fine pitch metal of a semiconductor package as well as the fine pitch wires of a printed circuit board (PCB), touch panels, displays, fine electrodes of solar cells, and so on.