Methods for improving joinder between a surface-mount package and a printed circuit board are disclosed. The warpage at a corner of the surface-mount package and at a corresponding corner of a joint area on the printed circuit board are measured to determine the degree of mismatch. A mini-pad is applied to the corner between the surface-mount package and the joint area on the printed circuit board. The thickness of the mini-pad pushes against the surface-mount package and the printed circuit board, reducing the degree of mismatch below a critical dimension of a ball grid array of the surface-mount package. The surface-mount package can then be soldered to the joint area, reducing or preventing the formation of solder bridges and short circuits.

The present disclosure provides a substrate, a maintenance method thereof and a display device. The substrate includes a base substrate, the base substrate is provided with at least one conductive pattern, and at least one of the at least one conductive pattern is interrupted and divided into a first conductive sub-pattern and a second conductive sub-pattern. The maintenance method includes: coating a conductive material in an interruption region in such a manner as to cover both the first conductive sub-pattern and the second conductive sub-pattern; and coating an organic insulation material at a side of the conductive material away from the base substrate, and curing the organic insulation material to form an organic protection film covering the conductive material.

An electronic assembly (100) includes a mechanical carrier (102), a plurality of integrated circuits (104A, 104B) disposed on the mechanical carrier, a fan out package (108) disposed on the plurality of integrated circuits, a plurality of singulated substrates (112A, 112B) disposed on the fan out package, a plurality of electronic components (114A, 114B) disposed on the plurality of singulated substrates, and at least one stiffness ring (116A, 116B, 116C) disposed on the plurality of singulated substrates. A method for constructing an electronic assembly includes identifying a group of known good singulated substrates, joining the group of known good singulated substrates into a substrate panel, attaching at least one bridge to the substrate panel that electrically couples at least two of the known good singulated substrates, and mounting a plurality of electronic components onto the substrate panel, each electronic component of the plurality of electronic components corresponding to a respective known good singulated substrate.

A method for manufacturing a mounting body comprising: a mounting step of mounting an electronic component onto a wiring board via an anisotropic conductive film containing a binder having an epoxy resin as a primary constituent and conductive particles having a compressive hardness (K) of 500 kgf/mm.sup.2 or more when compressively deformed by 10%, wherein a relation between a thickness (A) of the binder and an average particle diameter (B) is 0.6B/A1.5 and an elastic modulus of the binder after curing is 50 MPa or more at 100 C.; and a remounting step of mechanically peeling to detach the electronic component and the wiring board in the case of a problem occurring in mounting of the mounting step and reusing the wiring board to perform the mounting step.

Methods for refurbishing a circuitry device are disclosed. The methods described herein include applying a first flux to solder contacts connecting a first member of a circuitry device to a second member of the circuitry device; performing a first setting process on the circuitry device with the first flux; applying a second flux to the solder contacts of the circuitry device; performing a second setting process on the circuitry device; and reflowing the solder contacts.

A printed circuit board (PCB) may include a plurality of horizontally disposed signal layers. The PCB may include a first vertically disposed differential via electrically connected to a first horizontally disposed signal layer, of the plurality of horizontally disposed signal layers, and a second horizontally disposed signal layer of the plurality of horizontally disposed signal layers. The PCB may include a second vertically disposed differential via electrically connected to the first signal horizontally disposed layer and the second horizontally disposed signal layer. The PCB may include a first set of clearances encompassing the first vertically disposed differential via and the second vertically disposed differential via, a second set of clearances encompassing the first vertically disposed stub, and a third set of clearances encompassing the second vertically disposed stub.

A conductive trace interconnect tape for use with a printed circuit board or a flexible circuit substrate comprises a top insulating layer, an electrically conductive layer, and a bottom insulating layer. The top insulating layer is formed from electrically insulating material and is configured to provide electrical isolation from electrically conductive objects that are positioned on top of the conductive trace interconnect tape. The electrically conductive layer is positioned underneath the top insulating layer. The electrically conductive layer is formed from electrically conductive material and includes electrical interconnect traces, electrical component pads, or electrically conductive planar portions. The bottom insulating layer is positioned underneath the electrically conductive layer. The bottom insulating layer is formed from electrically insulating material and is configured to provide electrical isolation from electrically conductive objects that are positioned on the printed circuit board or flexible circuit substrate.

Embodiments of the invention include a dye and pry process for removing a surface mount technology (SMT) dual in-line memory module (DIMM) from card assemblies. Aspects of the invention include immersing a semiconductor package assembly in a solution comprising dye and placing the immersed semiconductor package assembly under vacuum pressure. Vacuum conditions ensure that the dye solution is pulled into any cracks in the solder formed between the semiconductor package assembly and the SMT DIMM. The package assembly is dried, and a dummy card stock is installed in the SMT DIMM using an epoxy. The SMT DIMM is then removed by applying a force to an exposed cavity between the dummy card stock and the semiconductor package assembly. The semiconductor package assembly and the SMT DIMM can then be inspected for the dye to locate cracks.

Methods, systems, and devices for buried lines and related fabrication techniques are described. An electronic device (e.g., an integrated circuit) may include multiple buried lines at multiple layers of a stack. For example, a first layer of the stack may include multiple buried lines formed based on a pattern of vias formed at an upper layer of the stack. The pattern of vias may be formed in a wide variety of spatial configurations, and may allow for conductive material to be deposited at a buried target layer. In some cases, buried lines may be formed at multiple layers of the stack concurrently.

Method for providing an electrical connection, comprising connecting a first cable to a first conducting structure on a printed circuit board, connecting a second cable to a second conducting structure on the printed circuit board, comparing a propagation delay of a first signal path comprising the first cable and the first conducting structure on the printed circuit board, and a propagation delay of a second signal path comprising the second cable and the second conducting structure on the printed circuit board; and removing conductive material of the first conducting structure and/or of the second conducting structure, in order to modify an electrical length of the first conducting structure and/or of the second conducting structure, to obtain a first conducting path and a second conducting path, in dependence on a result of the comparison, in order to reduce a difference of the propagation delays between the first signal path and the second signal path.