Provided is a method for producing a wired circuit board in which a first preparation step of preparing a first substrate having an insulating layer and a conductive layer disposed on one surface of the insulating layer; a second preparation step of preparing a second substrate having a metal layer; a bonding step of laminating the first substrate and the second substrate so that the conductive layer and the metal layer are in contact with each other, and metal-bonding the conductive layer and the metal layer; and a patterning step of forming a conductive pattern on the other surface of the insulating layer are carried out.

A method for manufacturing a wiring substrate includes forming a resin insulating layer on a first conductor layer such that the resin insulating layer covers the first conductor layer, applying a roughening treatment on a surface of the resin insulating layer on the opposite side with respect to the first conductor layer, forming an opening in the resin insulating layer after the roughening treatment on the surface of the resin insulating layer such that the opening penetrates through the resin insulating layer and exposes a portion of the first conductor layer, and forming a second conductor layer on the surface of the resin insulating layer such that the second conductor layer is formed in contact with the surface of the resin insulating layer and that a via conductor is formed in the opening of the resin insulating layer.

A method for manufacturing a flexible circuit electrode array, comprising: a) depositing a metal trace layer containing a base coating layer, a conducting layer and a top coating layer on the insulator polymer base layer; b) applying a layer of photoresist on the metal trace layer and patterning the metal trace layer and forming metal traces on the insulator polymer base layer; c) activating the insulator polymer base layer and depositing a top insulator polymer layer and forming one single insulating polymer layer with the base insulator polymer layer; d) applying a thin metal layer and a layer of photoresist on the surface of the insulator polymer layer and selective etching the insulator layer and the top coating layer to obtain at least one via; and e) filling the via with electrode material. A layer of polymer is laid down. A layer of metal is applied to the polymer and patterned to create electrodes and leads for those electrodes. A second layer of polymer is applied over the metal layer and patterned to leave openings for the electrodes, or openings are created later by means such as laser ablation. Hence the array and its supply cable are formed of a single body. Alternatively, multiple alternating layers of metal and polymer may be applied to obtain more metal traces within a given width. The method provides an excellent adhesion between the polymer base layer and the polymer top layer and insulation of the trace metals and electrodes.

Provided is a molded circuit component 300 in which a metal layer 200 is formed with high adhesion by giving a degree of freedom to a base material 100. In the molded circuit component 300 in which the metal layer 200 is formed in a processing region 110 in the base material 100, a plurality of recesses 120 each having a plurality of holes 130 are continuously formed in the processing region 110, the processing region 110 has a ratio of a width to a maximum depth with respect to a surface of the base material 100 of 10:1 to 6:1, the processing region 110 is formed to have a width in a range of 20 μm to 200 μm, and formed to have a maximum depth with respect to the surface of the base material 100 in a range of 2 μm to 30 μm, the metal layer 200 can be formed in the processing region 110 by laminating using a plating method, and a catalyst that reacts with a metal that forms the metal layer 200 at the time of the lamination is attached to the holes 130 and the recesses 120.

A plated molded article 1 is characterized in that a partial region R in a surface 21 of a base material 2 is provided with a plurality of non-penetrating holes 4 of substantially corresponding shapes and substantially corresponding sizes that are formed in a scattered pattern in such a manner as to be separated from each other at a substantially averaged hole density, and a plated part 3 is formed while filling the non-penetrating holes 4 and is provided continuously over the partial region R in such a manner as to extend across the non-penetrating holes 4. It is possible to obtain a plated molded article capable of forming a required plated part in a short time on a surface of a base material and capable of improving smoothness of an outer surface of the plated part and adhesion property of the plated part.

Disclosed is a method for manufacturing a wiring structure including a step of forming a wiring on an insulating resin layer. The step of forming the wiring includes: forming a modified region including pores in a surface layer of the insulating resin layer by treating a surface of the insulating resin layer with a treatment method including surface modification; forming a seed layer on the surface of the insulating resin layer by sputtering; and forming the wiring on the seed layer by electrolytic copper plating. The disclosed method may include, in this order: a step of forming a surface treatment agent layer that covers a surface of the wiring by treating the surface of the wiring with a surface treatment agent for improving adhesion; and a step of forming a modified region including pores in a surface layer of a first layer of the insulating resin layer by treating the surface of the first layer of the insulating resin layer with a treatment method including surface modification.

A multilayered polyimide film includes a first polyimide layer containing fluorine-containing polymer particles and having a first surface and a second surface, and a second polyimide layer and a third polyimide layer respectively disposed on the first surface and the second surface. The second and the third polyimide layers contain organic silicon oxygen compound particles. The multilayered polyimide film has a coefficient of thermal expansion (CTE) between about 13 and about 30 ppm/° C.

The present disclosure relates to a flexible printed circuit board (FPCB) and a method for manufacturing a flexible printed circuit board, which is capable of minimizing a process tolerance generated when an outer shape of a board is processed by forming a reference mark in the FPCB and performing an outer shape processing by using the reference mark as a reference point among a series of processes for manufacturing the board.

A 3D printed circuit apparatus includes a 3D printed circuit having a surface layer and one or more wires embedded under the surface layer, and a conductive metal pin that is cut to a desired length and inserted into the 3D printed circuit in order to attain contact with the wire or wires embedded under the surface layer.

An object is to provide a substrate for a printed wiring board that has good circuit formability while maintaining adhesion strength between a conductive layer (2) and a base film (1). The substrate includes a base film having an insulating property (1) and a conductive layer (2) formed on at least one surface of the base film (1). The maximum height Sz, which is defined in ISO25178, of the surface of the base film (1) is 0.05 μm or more and less than 0.9 μm.