A circuit apparatus includes a first circuit feature upon a first insulator and a second circuit feature upon the first insulator. The first circuit feature includes a planarized surface and the second circuit feature includes an irregular surface. The first circuit feature and the second circuit feature may be formed from patterning a conductive sheet that is upon the first insulator. The conductive sheet includes an irregular surface and a planarized surface. Conductive sheet roughness is minimized in first regions thereof and is maintained in second regions thereof. Selectively planarizing portions of the conductive sheet allows for the utilization of lower cost rougher conductive sheets. The planarized surface allows for increased signal integrity and reduced insertion loss and the irregular surface allows for increased adhesion and enhancing reliability of the circuit apparatus.

To provide a surface-treated copper foil that is excellent in adhesiveness to an insulating substrate at ordinary temperature, and is capable of suppressing the formation of blister on application of a thermal load of reflow soldering to a copper-clad laminate board constituted by the copper foil. A surface-treated copper foil having a surface-treated surface, the surface-treated copper foil satisfying one or more of the following conditions (1) to (3): by an XPS measurement at a depth after sputtering from the surface-treated surface for 0.5 min at a rate of 1.1 nm/min (SiO.sub.2 conversion), (1) the N concentration is from 1.5 to 7.5 atomic %; (2) the C concentration is from 12 to 30 atomic %; and (3) the Si concentration is 3.1 atomic % or more and the O concentration is from 40 to 48 atomic %.

A printed wiring board includes a core substrate, a first build-up layer, and a second build-up layer. The core substrate includes a core layer, through-hole conductors and through-hole lands. Metal foils of the through-hole lands in the core substrate have mat surfaces at interfaces of the core layer in the core substrate, metal foils of via lands in the build-up layers have inner mat surfaces at interfaces of insulating layers, and metal foils of outermost conductor layers in the build-up layers have outermost mat surfaces at interfaces of outermost insulating layers. Ten-point average roughness (RzI1) of the inner first mat surface is smaller than each of ten-point average roughness (Rz1, Rz2) of the mat surfaces and ten-point average roughness (RzO1, RzO2) of the outermost mat surfaces. Ten-point average roughness (RzI2) of the inner second mat surface is smaller than each of the ten-point average roughness (Rz1, Rz2, RzO1, RzO2).

A component carrier includes a base structure and an electrically conductive wiring structure on the base structure. The wiring structure has a nonrectangular cross-sectional shape configured so that an adhesion promoting constriction is formed by at least one of the group consisting of the wiring structure and a transition between the base structure and the wiring structure.

There is provided an electric connection member having a substrate, an insulating adhesive layer provided on the substrate, and a conductive interconnect, wherein the electric connection member is provided with a recess that opens at a side of the insulating adhesive layer, the conductive interconnect is disposed in the recess, a metal nano-ink is disposed on the conductive interconnect, and all of the metal nano-ink is contained inside the recess.

A base material for a printed circuit board includes a base film having an insulating property, and a sintered body layer including metal particles and layered on at least one surface of the base film. The sintered body layer includes sintered particles that are derived from the metal particles and partially embedded into the surface of the base film. The embedment ratio of the sintered particles is greater than or equal to 10% and less than or equal to 90%.

The present invention addresses the problem of providing a circuit board for which the manufacturing process is short and which has a laminate surface having uniform flatness. As a solution to the problem, this method for manufacturing a circuit board includes: manufacturing a three-layer metal (58) having, on one surface thereof, a first metal layer (26) formed in a pattern shape; manufacturing unit structures (60) each having the first metal layer (26), a cured first insulating base material (22) filled with a cured first conductive paste (32), a second metal layer (28), and a semi-cured second insulating base material (24) filled with a semi-cured second conductive paste (36); joining together the first insulating base material (22) in one unit structure (60) among a plurality of the unit structures with the second insulating base material (24) in another unit structure (60); and layering the plurality of unit structures (60).

Graphene ink compositions comprising nitrocellulose and related methods of use comprising either thermal or photonic annealing.

The present invention relates to a release layer for a metal foil with carrier and a metal foil with carrier including the release layer. The release layer is designed for easy removal of the carrier and includes one or more nitrogenous heterocyclic compounds and one or more inorganic compounds containing at least one metal selected from the group consisting of nickel, molybdenum, cobalt, phosphorus, manganese, and iron.

There is provided an electric connection member having a substrate, an insulating adhesive layer provided on the substrate, and a conductive interconnect, wherein the electric connection member is provided with a recess that opens at a side of the insulating adhesive layer, the conductive interconnect is disposed in the recess, a metal nano-ink is disposed on the conductive interconnect, and all of the metal nano-ink is contained inside the recess.