A wiring substrate includes an insulating layer including resin and filler particles, conductor layers including an upper-layer conductor layer and a lower-layer conductor layer such that the insulating layer is sandwiched between the upper-layer and lower-layer conductor layers, and a penetrating conductor formed in the insulating layer such that the penetrating conductor is penetrating through the insulating layer and connecting the upper-layer and lower-layer conductor layers. The penetrating conductor is formed such that the penetrating conductor has a first length which is the maximum width of the penetrating conductor in the direction orthogonal to the thickness direction of the wiring substrate and the first length is 25 μm or less, and the insulating layer is formed such that the maximum particle size of the filler particles in a region within the distance of 40% of the first length from the penetrating conductor is 20% or less of the first length.

A circuit board structure includes a redistribution structure layer, a build-up circuit structure layer, and a connection structure layer. The redistribution structure layer has a first and second surface, and includes an inner and outer dielectric layer, first connecting pads, and chip pads. A bottom surface of each first connecting pad is aligned with the first surface, and the chip pads are protruded from and located on the second surface. The build-up circuit structure layer includes second connecting pads. The connection structure layer is disposed between the redistribution structure layer and the build-up circuit structure layer and includes a substrate and conductive paste pillars penetrating the substrate. The first connecting pads are electrically connected to the second connecting pads via the conductive paste pillars, respectively. A top surface of each conductive paste pillar is aligned with the first surface of the redistribution structure layer.

A circuit board may include a plurality of electrically-conductive layers separated and supported by layers of insulating material laminated together and a via electrically coupled to a first layer of the circuit board and coupled to a second layer of the circuit board, the via comprising a first via portion comprising electrically-conductive material and having a first diameter and a first depth from a surface of the circuit board and a second via portion comprising electrically-conductive material and having a second diameter smaller than the first diameter and a second depth from the first depth.

Electronic modules and methods of fabrication are described. In an embodiment, an electronic module includes a molded system-in-package, and a flexible circuit mounted on a side surface of a molding compound layer such that the flexible circuit is in electrical contact with a lateral interconnect exposed along the side surface of the molding compound layer.

A component carrier includes a stack having at least one horizontal electrically conductive layer structure, at least one electrically insulating layer structure, a semiconductor component embedded in the stack, and at least one vertical via being laterally offset from the semiconductor component. The at least one horizontal electrically conductive layer structure electrically connects the vertical via to a bottom main surface of the semiconductor component. The component carrier is configured for a current flow from the vertical via to the horizontal electrically conductive layer structure, from the horizontal electrically conductive layer structure to the bottom main surface of the semiconductor component, from the bottom main surface of the semiconductor component to an upper main surface of the semiconductor component, and from the upper surface of the semiconductor component to the outside of the component carrier.

A wiring substrate includes a first insulating layer, a conductor layer formed on the first insulating layer, a second insulating layer formed on the first insulating layer such that the second insulating layer is covering the conductor layer, and a coating film formed on a surface of the conductor layer such that the coating film is adhering the conductor layer and the second insulating layer. The conductor layer includes a conductor pad and a wiring pattern, and the conductor pad of the conductor layer has a mounting surface including a first region and a component mounting region formed such that the second insulating layer has a through hole exposing the component mounting region and that the first region is covered by the second insulating layer and roughened to have a surface roughness higher than a first surface roughness of a surface of the wiring pattern facing the second insulating layer.

[Object] Provided is a printed circuit board ensuring a degree of freedom in circuit design and unlikely to cause a circuit connection failure.

[Solving Means] A middle interlayer circuit 11, an upper surface side interlayer circuit 12, and a lower surface side interlayer circuit 13 are formed from a connection surface-less integral conductor. In addition, a connection surface 33 between the upper surface side interlayer circuit 12 and an upper surface side surface layer circuit 14 and a connection surface 34 between the lower surface side interlayer circuit 13 and a lower surface side surface layer circuit 15 lack a connection surface in a plate thickness direction, and thus a satisfactory connection state is achieved. Accordingly, a first circuit 10 is unlikely to cause a connection failure. In addition, the upper surface side interlayer circuit 12 and the lower surface side interlayer circuit 13 can be disposed at misaligned positions in the plane direction of the printed circuit board, and thus the degree of freedom in circuit design increases. Plane circuits 24 and 16 not connected to the first circuit can be disposed with insulating layers 31 and 32 sandwiched below the upper surface side interlayer circuit 12 or above the lower surface side interlayer circuit 13.

A transparent antenna includes a substrate, an antenna grid layer, and a ground grid layer. The substrate has an electrically conductive hole extending from two opposite surfaced of the substrate. The antenna grid layer is formed on a surface of the substrate. The antenna grid layer includes a feeding portion and a transmission portion. The ground grid layer is formed on another surface of the substrate. The ground grid layer is coupled to the feeding portion of the antenna grid layer via the electrically conductive hole. An offset distance between a projection of a gridline of the antenna grid layer on the first surface and a projection of a gridline of the ground grid layer on the first surface is smaller than or equal to half of a difference between a line width of the antenna grid layer and a line width of the ground grid layer.

A method of making leak tight electrical connections through the wall of a ceramic package, for example a ceramic package used on an image intensifier tube. The method comprises a hole metallisation step (500) to obtain vias, the metallisation step comprising the deposition of a bond layer (510), a diffusion barrier (520) acting as a metallic base layer and a wetting agent (530). For each via, a filler metal preform made of indium or a eutectic chosen from among InSn, AuSn, AuGe, AgSn is deposited (540) on each orifice and is heated to a temperature higher than its melting temperature (550) such that the molten filler metal closes off the via to make it leak tight.

A method for manufacturing a plurality of components, each of the plurality of components including at least one electrical feedthrough, in which a functional element is fastened in a feedthrough opening in a base body by way of an electrically insulating material, an information being acquired in association with each of the plurality of components, the method comprising the steps of: providing, in one of a plurality of manufacturing steps of the method, each of the plurality of components or one of a plurality of pre-stages of each of the plurality of components with an information store, at least one of (i) the information being stored in the information store, and (ii) an identifier is stored in the information store and the information is stored in a database in association with the identifier.