A component carrier includes (a) a first stack with at least one first electrically conductive layer structure and/or at least one first electrically insulating layer structure; (b) a hole formed within the first stack; and (c) a non-deformable solid body closing a portion of the hole and being spaced with respect to side walls of the hole by a gap. A component carrier assembly includes (a) a component carrier as described above; (b) a second stack having at least one second electrically conductive layer structure and/or at least one second electrically insulating layer structure; and (c) a connection piece connecting the first stack with the second stack. Further described are methods for manufacturing such a component carrier and such a component carrier assembly.

An insulating sheet for use in forming an insulating layer of an interconnect substrate includes a semi-cured insulating resin layer, a semi-cured protective resin layer laminated on an upper surface of the insulating resin layer, and a cover layer laminated on an upper surface of the protective resin layer, wherein the protective resin layer has lower resistance to a predetermined solution than the insulating resin layer has, the predetermined solution being capable of dissolving the insulating resin layer and/or the protective resin layer.

A system includes a printed circuit board (PCB). The PCB includes a radio frequency (RF) circuit that includes a plurality of circuit modules and signal trace lines. Each circuit module is electrically connected to at least one other circuit module by a signal trace line. The system includes a via fence comprising fence walls having at least two materials laminated using a printed wire board (PWB) process. The fence walls include a plurality of vias. The fence walls form a plurality of free-form RF isolation chambers, each chamber includes chamber walls that surround each circuit module outside of the PCB. The embodiments also include a method of manufacturing and/or isolating the system or components of the system.

A connection method for a chip and a circuit board includes: placing the circuit board on the chip, the circuit board having a first surface in contact with the chip having a plurality of contacts, and the circuit board having a plurality of through holes aligned with the plurality of contacts respectively; placing a mask on a second surface of the circuit board, the mask having a plurality of openings aligned with the plurality of through holes respectively; covering a surface of the mask with a conductive adhesive to fill the plurality of through holes with the conductive adhesive; and keeping portions of the conductive adhesive that are respectively in the plurality of through holes to be spaced apart from each other. The portions of the conductive adhesive that fill the plurality of through holes remain to provide an electrical connection between the circuit board and the chip.

A method of manufacturing a component carrier includes laser drilling a blind hole in a layer stack, and subsequently extending the blind hole to a through hole by etching. A component carrier includes an electrically insulating layer structure, an electrically conductive layer structure directly on an electrically insulating layer structure, and a tapering through hole extending through the electrically conductive layer structure and through the electrically insulating layer structure with a lateral overhang of the electrically conductive layer structure beyond the electrically insulating layer structure at the tapering through hole of not more than 20% of a maximum diameter of the tapering through hole.

A method of manufacturing a component carrier includes laser drilling a blind hole in a layer stack, and subsequently extending the blind hole to a through hole by etching. A component carrier includes an electrically insulating layer structure, an electrically conductive layer structure directly on an electrically insulating layer structure, and a tapering through hole extending through the electrically conductive layer structure and through the electrically insulating layer structure with a lateral overhang of the electrically conductive layer structure beyond the electrically insulating layer structure at the tapering through hole of not more than 20% of a maximum diameter of the tapering through hole.

A component carrier includes an electrically insulating layer structure having a first main surface and a second main surface with a through hole extending through the electrically insulating layer structure between the first main surface and the second main surface. An electrically conductive bridge structure connects opposing sidewalls of the electrically insulating layer structure delimiting the through hole. A vertical thickness of the electrically insulating layer structure is not more than 200 μm and a narrowest vertical thickness of the bridge structure is at least 20 μm.

A component carrier includes an electrically insulating layer structure having a first main surface and a second main surface with a through hole extending through the electrically insulating layer structure between the first main surface and the second main surface. An electrically conductive bridge structure connects opposing sidewalls of the electrically insulating layer structure delimiting the through hole. A vertical thickness of the electrically insulating layer structure is not more than 200 μm and a narrowest vertical thickness of the bridge structure is at least 20 μm.

An all-directions embedded module includes a substrate layer, many first embedded pads, many second embedded pads, and many side wall circuits. The substrate layer comprises a first surface, a second surface opposite to the first surface, and a plurality of side surfaces connected to the first surface and the second surface. The first embedded pads is formed on the first surface. The second embedded pads is formed on the second surface. The side wall circuits embedded in the substrate layer and exposed from the side surfaces. The all-directions embedded module further includes a plurality of first connecting circuits formed on the first surface and a plurality of second connecting circuits formed on the second surface. The first embedded pads is connected to the side wall circuits by the first connecting circuits. The second embedded pads is connected to the side wall circuits by the second connecting circuits.

A method is provided for forming waveguides in a PCB. The method may include forming an opening in a PCB core comprising a plurality of conductive layers interleaved with a plurality of insulating layers, the opening extending from a first side of the PCB core to a second side of the PCB core. The method may also include filling the opening with metal. The method may also include forming a cavity enclosed by sidewalls by removing a first portion of the filled opening, the cavity extending from the first side of the PCB core to the second side of the PCB core. A second portion of the filled opening is a heat transfer element configured to transfer heat from the first side of the PCB core to the second side of the PCB core. The at least one waveguide is embedded within the heat transfer element and configured for transmitting signals from the first side to the second side.