A touch structure and a method of manufacturing the touch structure are provided. The method includes: forming a first conductive layer on a base substrate; forming a second conductive layer on the first conductive layer; and patterning the first conductive layer and the second conductive layer to respectively form a first conductive layer pattern and a second conductive layer pattern; the first conductive layer pattern is formed after the second conductive layer pattern is formed, and the first conductive layer pattern and the second conductive layer pattern are different from each other.

A stretchable wiring board that includes: a stretchable substrate; a first wiring line on the stretchable substrate; an insulating layer overlapping a first part of the first wiring line in a plan view of the stretchable wiring board; and a second wiring line overlapping the first part of the first wiring line in the plan view with the insulating layer interposed therebetween. The insulating layer has at least one first notch, and in the plan view, the at least one first notch does not overlap the first wiring line and overlaps the second wiring line.

The present disclosure provides a display substrate, a method for manufacturing the display substrate, and a display device. The display substrate includes a first conductive line extending in a first direction on a base substrate, a second conductive line extending in a second direction crossing the first direction on the base substrate, and an insulation layer arranged between the first conductive line and the second conductive line. The display substrate further includes a buffer layer arranged between the first conductive line and the base substrate, a groove extending in the first direction is formed in the buffer layer, the first conductive line is arranged in the groove, and a surface of the first conductive line away from the base substrate is flush with a surface of the buffer layer away from the base substrate.

A method for producing a wired circuit board including an insulating layer and a conductive pattern, including (1), providing the insulating layer having an inclination face; (2), providing a metal thin film at least on the surface of the insulating layer; (3), providing a photoresist on the surface of the metal thin film; (4), disposing a photomask so that a first portion, where the conductive pattern is provided in the photoresist, is shielded from light, and the photoresist is exposed to light through the photomask; (5), removing the first portion to expose the metal thin film corresponding to the first portion; and (6), providing the conductive pattern on the surface of the metal thin film exposed from the photoresist. The inclination face has a second portion that allows the light reflected at the metal thin film to reach the first portion.

A method of running a printed circuit board (PCB) trace on a PCB. The PCB comprising a plurality of PCB layers. The method comprising forming a conductive trace on at least one of the plurality of PCB layers; coupling a first portion of the conductive trace to a capacitor formed on at least one of the plurality of PCB layers; coupling a second portion, different from the first portion, of the conductive trace to a conductive material formed within a first via extending through two or more of the plurality of PCB layers; and configurably setting a length of a conductive path of the conductive trace according to a predetermined impedance. The capacitor is separated laterally in a plan view at a first distance from the first via. The length of the conductive trace in the plan view is greater than the first distance. The conductive path of the conductive trace of the length has the predetermined impedance.

A method for manufacturing circuit board, including: providing a substrate; printing a first conductive layer on a surface of the substrate, the first conductive layer includes a plurality of electrode units arranged in an M*N array, each of the electrode units includes a first electrode, and a plurality of second electrodes distributed around the first electrode; printing a first insulating layer on a side of the first conductive layer away from the substrate; printing a second conductive layer on a side of the first insulating layer away from the substrate; printing an anti-oxidation layer to cover surfaces of the first conductive layer and the second conductive layer away from the substrate; and printing a second insulating layer to cover regions of the substrate not covered by the first electrode and the second electrode. A circuit board is also provided.

High-speed interconnects for printed circuit boards and methods for forming the high-speed interconnects are described. A high-speed interconnect may comprise a region of a conductive film having a reduced surface roughness and one or more regions that have been treated for improved bonding with an adjacent insulating layer. Regions of reduced roughness may be used to carry high data rate signals within PCBs. Regions treated for bonding may include a roughened surface, adhesion-promoting chemical treatment, and/or material deposited to improve wettability of the surface and/or adhesion to a cured insulator.

A wiring substrate includes signal input portions for inputting signals, a signal receiving portion that receives the signals input from the signal input portions, and a plurality of connection wires provides connections between the signal input portions and the signal receiving portion. The plurality of connection wires constitutes a connection wire group in which three connection wires are arranged overlapping one another with insulating layers being interposed therebetween, and the connection wire group is provided with a switching contact portion at which transmission paths of the signals respectively input to the connection wires are switched to the other connection wires.

A method of running a printed circuit board (PCB) trace on a PCB. The PCB comprising a plurality of PCB layers. The method comprising forming a conductive trace on at least one of the plurality of PCB layers; coupling a first portion of the conductive trace to a capacitor formed on at least one of the plurality of PCB layers; coupling a second portion, different from the first portion, of the conductive trace to a conductive material formed within a first via extending through two or more of the plurality of PCB layers; and configurably setting a length of a conductive path of the conductive trace according to a predetermined impedance. The capacitor is separated laterally in a plan view at a first distance from the first via. The length of the conductive trace in the plan view is greater than the first distance. The conductive path of the conductive trace of the length has the predetermined impedance.

A stretchable wiring board that includes a stretchable substrate having a first main surface with a first region, a second region adjacent the first region, and a third region adjacent the second region; a first stretchable wiring line on the first main surface and extending over the first region; an insulating layer extending over the first region and the second region; and a second stretchable wiring line extending over the first region, the second region, and the third region. At a position in the first region where the total thickness of the first stretchable wiring line, the insulating layer, and the second stretchable wiring line is the largest, the thicknesses of the first stretchable wiring line, the insulating layer, and the second stretchable wiring line satisfy a predetermined relationship with the thickness of the second stretchable wiring line at a boundary between the second region and the third region.