In an embodiment a carrier includes a base substrate, at least one insulating layer, at least one inner wiring layer, at least one outer wiring layer and at least one through-via in the insulating layer extending through the insulating layer, wherein the base substrate and the insulating layer are formed from different materials, wherein the base substrate is formed for mechanically stabilizing the carrier and supports the insulating layer, wherein the inner wiring layer is arranged in a vertical direction at least in places between the base substrate and the insulating layer, wherein the outer wiring layer is spatially separated from the inner wiring layer at least in places by the insulating layer, and wherein the through-via electrically conductively connects the inner wiring layer to the outer wiring layer and has a lateral cross-section having a maximum lateral extent of at most 100 μm.

A method for manufacturing a multilayer substrate including first and second insulating resin base material layers including different materials, includes configuring a conductor film-attached insulating resin base material with a conductor film on the first insulating resin base material layer, or a second conductor film-attached insulating resin base material with a conductor film on a main surface of the first insulating resin base material layer including a main surface of a stacked body including at least the first insulating resin base material layer, and stacking the first or second conductor film-attached insulating resin base material and another base material layer such that the conductor film is in contact with the second insulating resin base material layer. An adhesion strength of the first insulating resin base material layer to the conductor film is higher than an adhesion strength of the second insulating resin base material layer to the conductor film.

A method for manufacturing a circuit board comprising: providing an inner circuit substrate board comprising a first transmission area, a bendable area, and a second transmission area which are connected in an order, wherein the inner circuit substrate board further comprises a substrate layer and an inner circuit layer on the substrate layer, the inner circuit layer comprises a first signal circuit; pressing a first outer circuit substrate board on the inner circuit layer; wherein the first outer circuit substrate board comprises a first dielectric layer formed on the inner circuit layer and a first outer circuit layer formed on the first dielectric layer; the first dielectric layer is located in the first transmission area and the second transmission area; two ends of the first signal circuit are electrically connected to the first outer circuit layer.

A wiring board includes an insulating layer, a thin film capacitor laminated on the insulating layer, an interconnect layer electrically connected to the thin film capacitor, and an encapsulating resin layer laminated on the thin film capacitor. The interconnect layer includes a pad protruding from the thin film capacitor. The encapsulating resin layer is a mold resin having a non-photosensitive thermosetting resin as a main component thereof. The encapsulating resin layer exposes a top surface of the pad, and covers at least a portion of a side surface of the pad.

A semiconductor device package includes a first conductive structure, a stress buffering layer and a second conductive structure. The first conductive structure includes a substrate, at least one first electronic component embedded in the substrate, and a first circuit layer disposed on the substrate and electrically connected to the first electronic component. The first circuit layer includes a conductive wiring pattern. The stress buffering layer is disposed on the substrate. The conductive wiring pattern of the first circuit layer extends through the stress buffering layer. The second conductive structure is disposed on the stress buffering layer and the first circuit layer.

Presented herein is a WLCSP intermediate structure and method forming the same, the method comprising forming a first redistribution layer (RDL) on a carrier, the first RDL having mounting pads disposed on the first RDL, and mounting interposer dies on a second side of the first RDL. A second RDL is formed over a second side of the interposer dies, the second RDL having a first side adjacent to the interposer dies, one or more lands disposed on the second RDL, at least one of the one or more lands in electrical contact with at least one of the interposer dies or at least one of the mounting pads. A molding compound is formed around the interposer dies and over a portion of the first RDL prior to the forming the second RDL and the second RDL is formed over at least a portion of the molding compound.

A method for manufacturing a circuit board comprising: providing an inner circuit substrate board comprising a first transmission area, a bendable area, and a second transmission area which are connected in an order, wherein the inner circuit substrate board further comprises a substrate layer and an inner circuit layer on the substrate layer, the inner circuit layer comprises a first signal circuit; pressing a first outer circuit substrate board on the inner circuit layer; wherein the first outer circuit substrate board comprises a first dielectric layer formed on the inner circuit layer and a first outer circuit layer formed on the first dielectric layer; the first dielectric layer is located in the first transmission area and the second transmission area; two ends of the first signal circuit are electrically connected to the first outer circuit layer.

A touch structure and a method of manufacturing the touch structure are provided. The method includes: forming a first conductive layer on a base substrate; forming a second conductive layer on the first conductive layer; and patterning the first conductive layer and the second conductive layer to respectively form a first conductive layer pattern and a second conductive layer pattern; the first conductive layer pattern is formed after the second conductive layer pattern is formed, and the first conductive layer pattern and the second conductive layer pattern are different from each other.

A power device embedded PCB includes a printed circuit board having a first major surface separated by a thickness and opposite a second major surface and an embedded power device. The embedded power device may include a power semiconductor device, an electrically and thermally conductive substrate bonded to the power semiconductor device along a first surface of the electrically and thermally conductive substrate and bonded to an electrical insulation layer on a second surface of the electrically and thermally conductive substrate opposite the first surface and a thermally conductive substrate bonded to the electrical insulation layer on a surface opposite the bonded electrically and thermally conductive substrate. The power semiconductor device, the electrically and thermally conductive substrate, the electrical insulation layer, and the thermally conductive substrate are disposed within the printed circuit board. The thermally conductive substrate forms a bondable surface adjacent the second major surface of the printed circuit board.

A multi-layer line structure including a substrate, a lower layer Cu line located on the substrate, an upper layer Cu line located on an insulating layer including an inorganic film located on the lower layer Cu line and an organic resin film located on the inorganic film, and a via connection part located in a via connection hole running in an up-down direction through the insulating layer in an area where the lower layer Cu line and the upper layer Cu line overlap each other is provided. The via connection part includes a barrier conductive layer located on a part of the lower layer Cu line exposed to a bottom part of the via connection hole and on an inner wall of the via connection hole.