Patent classifications
H05K2201/049
Spacer for Surface Mountable Electronic Components
A spacer is provided to allow a surface mount device (SMD) to be surface mounted onto a PCB with greater degrees of freedom. The spacer is designed to be surface mountable to the PCB and includes an electrically non-conducting body that has a first surface facing the SMD, a second surface facing the PCB, and through holes and/or indents in the electrically non-conducting body to accommodate electrical conductors that provide electrical connections between the SMD and the PCB. The spacer may provide one or more of: an elevated height (so that the SMD is elevated above the PCB), an offset along the surface of the PCB relative to a designated position for the SMD on the PCB, or a tilt in one or more directions relative to a surface of the PCB.
CIRCUIT BOARD
A circuit board optimized for a denser component population within a standard size of footprint includes a mother board and a plurality of sub-board layers stacked on and connected to the mother board. Each of the sub-board layers has a plurality of daughter boards. The sub-board layers are composed of a first sub-board layer and a second sub-board layer. The daughter boards of the first sub-board layer are arranged on a side of the mother board, and the daughter boards of the second sub-board layer are arranged on the daughter boards of the first sub-board layer.
Orientation-agnostic method to interface to printed memory label
An electronic system for identifying an article can include a printed memory having a plurality of contact pads electrically coupled to a plurality of landing pads positioned on a first side of a printed circuit board (PCB) substrate. The plurality of landing pads can be electrically coupled to a plurality of endless, concentric contact lines positioned on a second side of the PCB substrate through a plurality of vias that extend through a thickness of the PCB substrate and a plurality of traces that electrically couple the plurality of vias with the plurality of landing pads. To perform a memory operation on the printed memory, contact probes of a reader are physically and electrically contacted with the plurality of concentric contact lines. In some implementations, the memory operation can be performed on the printed memory irrespective of a rotational orientation of the printed memory relative to the reader.
ORIENTATION-AGNOSTIC METHOD TO INTERFACE TO PRINTED MEMORY
An electronic system for identifying an article can include a printed memory having a plurality of contact pads electrically coupled to a plurality of landing pads positioned on a first side of a printed circuit board (PCB) substrate. The plurality of landing pads can be electrically coupled to a plurality of endless, concentric contact lines positioned on a second side of the PCB substrate through a plurality of vias that extend through a thickness of the PCB substrate and a plurality of traces that electrically couple the plurality of vias with the plurality of landing pads. To perform a memory operation on the printed memory, contact probes of a reader are physically and electrically contacted with the plurality of concentric contact lines. In some implementations, the memory operation can be performed on the printed memory irrespective of a rotational orientation of the printed memory relative to the reader.
SEMICONDUCTOR LIGHT EMITTING DEVICE
Semiconductor light emitting device includes: substrate including main and back surfaces, first and second side surfaces, and bottom and top surfaces, wherein main surface includes first to fourth sides; first main surface electrode on main surface and including first base portion contacting the sides of the main surface, and die pad connected to first base portion; second main surface electrode disposed on the main surface and including second base portion contacting first and third sides of the main surface, and wire pad connected to second base portion; semiconductor light emitting element including first electrode pad and mounted on die pad; wire connecting first electrode pad and wire pad; first insulating film covering portion between first base portion and die pad; second insulating film covering portion between second base portion and wire pad and having end portions contacting main surface; and light-transmitting sealing resin.
CHIP INTERCONNECT DEVICES
An interconnect device may include a first center conductor of a first material that has a first durometer. The first center conductor may be surrounded by a first inner dielectric ring, which may be surrounded by a conductive region of a second material having a second durometer. The second durometer may be different from the first durometer. The conductive region may have a first end that defines a first plane and a second end that defines a second plane. An outer dielectric ring may surround the conductive region. The first center conductor may have a first bulb and a second bulb, the first bulb may extend in a direction away from the second plane and beyond the first plane, and the second bulb may extend in a direction away from the first plane and beyond the second plane.
CAMERA MODULE
A camera module according to the present invention may comprise: a barrel that accommodates a lens therein; a printed circuit board formed under the barrel and mounted with an image sensor; a body portion integrally formed with the barrel; a holder comprising a leg portion formed by being extended downward from the lower end of the body portion to the same height as the image plane of the lens; and a fixing portion formed downward from the leg portion to have a predetermined thickness to fix the holder to the printed circuit board, wherein the thickness of the fixing portion may be equal to the height from the upper surface of the printed circuit board to the image plane of the image sensor.
CHIP ON FILM PACKAGE AND DISPLAY DEVICE INCLUDING THE SAME
A chip on film package includes; a flexible base film having a first surface and a second surface opposite to each other, and having a chip mounting region on the first surface; a plurality of wirings extending in a first direction toward the chip mounting region; a semiconductor chip mounted in the chip mounting region on the first surface of the base film and electrically connected to the wirings; a pair of first heat dissipation members on the first surface of the base film and spaced apart from the semiconductor chip, and extending in a second direction perpendicular to the first direction; and a second heat dissipation member on the first surface of the base film and covering the semiconductor chip and the pair of first heat dissipation members.
Circuit board
A circuit board optimized for a denser component population within a standard size of footprint includes a mother board and a plurality of sub-board layers stacked on and connected to the mother board. Each of the sub-board layers has a plurality of daughter boards. The sub-board layers are composed of a first sub-board layer and a second sub-board layer. The daughter boards of the first sub-board layer are arranged on a side of the mother board, and the daughter boards of the second sub-board layer are arranged on the daughter boards of the first sub-board layer.
HIGH DENSITY ORGANIC BRIDGE DEVICE AND METHOD
Embodiments that allow multi-chip interconnect using organic bridges are described. In some embodiments an organic package substrate has an embedded organic bridge. The organic bridge can have interconnect structures that allow attachment of die to be interconnected by the organic bridge. In some embodiments, the organic bridge comprises a metal routing layer, a metal pad layer and interleaved organic polymer dielectric layers but without a substrate layer. Embodiments having only a few layers may be embedded into the top layer or top few layers of the organic package substrate. Methods of manufacture are also described.