Patent classifications
H05K2201/0776
CIRCUIT BOARD AND MANUFACTURING METHOD THEREOF
A circuit board is obtained by providing a wiring pattern on an insulating board. The circuit board includes a first region and a second region. In the first region, a first wiring pattern is provided on which a first surface treatment is applied. In the second region, a second wiring pattern is provided on which a second surface treatment having a cutting fluid resistance and/or a humidity resistance lower than the first surface treatment is applied.
Apparatus and methods for via connection with reduced via currents
Apparatuses and methods including conductive vias of a printed circuit board are described. An example apparatus includes a first layer including a first conductive plate; a component on the first layer, a second layer including a second conductive plate that may be coupled to an external power source; a third layer between the first layer and the second layer, the third layer including a third conductive plate; a first via coupling the first conductive plate to the second conductive plate; and a second via coupled to the first conductive plate. The first conductive plate includes a first portion coupled to the first via and the first conductive plate further includes a second portion coupled to the second via between the first portion and the component. The second via is coupled to either the second conductive plate or the third conductive plate.
ELECTRONIC MODULE AND ELECTRONIC DEVICE
An electronic module includes a plurality of loads, a first wiring portion, a second wiring portion, a power source unit, and a feedback portion. The first wiring portion includes a plurality of first portions to which the plurality of loads are respectively connected, and a plurality of second portions each closest to a corresponding one of the plurality of first portions. The second wiring portion is connected to the plurality of second portions. The power source unit includes a feedback terminal, an output terminal, and a power source circuit. In the first wiring portion, a minimum path length from each of the plurality of second portions to the corresponding one of the plurality of first portions is smaller than 1/2 of a minimum path length from a part of the first wiring portion connected to the output terminal to the corresponding one of the plurality of first portions.
Filter
A filter is disposed on a base board. The filter includes a first portion, a second portion, a ground portion, a first coupling portion and a second coupling portion. The first portion is disposed on a first layer in the base board to input signals. The second portion is disposed on the first layer to output signals. The ground portion is disposed on a second layer in the base board. The first coupling portion is disposed on the first layer. The first coupling portion is electrically coupled to the first portion and the second portion. The first coupling portion is electrically coupled to the ground portion through via holes. The second coupling portion is disposed on the first layer. The second coupling portion is electrically coupled to the first portion and the second portion. The second coupling portion is electrically coupled to the ground portion through the via holes.
PACKAGE COMPONENT
A package component includes a first substrate and a first conductive layer. The first substrate has a first surface and a second surface opposite to the first surface. The first conductive layer is disposed over the first surface of the first substrate. The first conductive layer includes a first conductive feature and a second conductive feature over the first conductive feature. The second conductive features covers a portion of the first conductive feature. A resistance of the second conductive feature is lower than a resistance of the second conductive feature. The first substrate includes a single-sided or a double-sided copper-clad laminate.
SUBSTRATE INCLUDING A REFERENCE VOLTAGE LAYER HAVING AN IMPEDANCE CALIBRATOR
A substrate in accordance with an embodiment of the disclosure includes a signal transmission layer including a signal transmission pad and a signal transmission interconnection; a first dielectric layer stacked on the signal transmission layer; and a first reference voltage layer stacked on the first dielectric layer. The first reference voltage layer includes a first space hole and an impedance calibrator. The impedance calibrator includes an impedance calibration part disposed in the first space hole; and a first bridge connecting a first portion of the impedance calibration part to a first portion of the first reference voltage layer.
APPARATUS AND METHODS FOR VIA CONNECTION WITH REDUCED VIA CURRENTS
Apparatuses and methods including conductive vias of a printed circuit board are described. An example apparatus includes a first layer including a first conductive plate; a component on the first layer, a second layer including a second conductive plate that may be coupled to an external power source; a third layer between the first layer and the second layer, the third layer including a third conductive plate; a first via coupling the first conductive plate to the second conductive plate; and a second via coupled to the first conductive plate. The first conductive plate includes a first portion coupled to the first via and the first conductive plate further includes a second portion coupled to the second via between the first portion and the component. The second via is coupled to either the second conductive plate or the third conductive plate.
Apparatus and methods for via connection with reduced via currents
Apparatuses and methods including conductive vias of a printed circuit board are described. An example apparatus includes a first layer including a first conductive plate; a component on the first layer, a second layer including a second conductive plate that may be coupled to an external power source; a third layer between the first layer and the second layer, the third layer including a third conductive plate; a first via coupling the first conductive plate to the second conductive plate; and a second via coupled to the first conductive plate. The first conductive plate includes a first portion coupled to the first via and the first conductive plate further includes a second portion coupled to the second via between the first portion and the component. The second via is coupled to either the second conductive plate or the third conductive plate.
POPULATION OF METAL OXIDE NANOSHEETS, PREPARATION METHOD THEREOF, AND ELECTRICAL CONDUCTOR AND ELECTRONIC DEVICE INCLUDING THE SAME
An electrical conductor includes a substrate; and a first conductive layer disposed on the substrate and including a plurality of metal oxide nanosheets, wherein adjacent metal oxide nanosheets of the plurality of metal oxide nanosheets contact to provide an electrically conductive path between the contacting metal oxide nanosheets, wherein the plurality of metal oxide nanosheets include an oxide of Re, V, Os, Ru, Ta, Ir, Nb, W, Ga, Mo, In, Cr, Rh, Mn, Co, Fe, or a combination thereof, and wherein the metal oxide nanosheets of the plurality of metal oxide nanosheets have an average lateral dimension of greater than or equal to about 1.1 micrometers. Also an electronic device including the electrical conductor, and a method of preparing the electrical conductor.
Electrical contact pad for electrically contacting a connector
An electrical contact pad for electrically contacting a connector includes first, second and third regions. The first region is connected to a trace. The second region is adjacent to the first region and has a width less than the first region. The third region is adjacent to the second region and has a width that is greater than the second region. The third region is sized to make contact with a connector. Having the width of the second region be smaller than the width of the first and third regions increases an impedance of the electrical contact pad.