A method of manufacturing a component carrier is disclosed. The method includes providing a stack having at least one electrically conductive layer structure and/or at least one electrically insulating layer structure, embedding a component in the stack, drilling a blind hole in the stack towards the embedded component, and thereafter extending the blind hole by etching to thereby expose a surface portion of the embedded component.

One embodiment can provide a method and system for compensating for timing skew in a differential pair transmission line on a printed circuit board (PCB). During operation, the system obtains a PCB comprising one or more layers and at least a differential pair transmission line. The differential pair transmission line comprises first and second transmission lines, with a respective transmission line coupled to at least one via extending through the one or more layers of the PCB. The system determines a difference in length between first and second transmission lines and determines a stub length of the at least one via based on the determined difference in length between the first and second transmission lines, thereby compensating for the time skew in the differential pair transmission line.

This application provides a multilayer printed circuit board (PCB). There is a pad array on a surface of the multilayer PCB. The pad array includes at least one padding unit, and each padding unit includes a first pad and a second pad that are adjacent. Both the first pad and the second pad are connected to a first Z-directed transmission line located in a Z-directed groove. In this way, to wire a signal wire on a signal layer of the multilayer PCB, a quantity of Z-directed grooves that need to be bypassed is less than a quantity of vias that need to be bypassed in the prior art. In other words, wiring of the signal wire is easier to some extent. In addition, this application further provides a corresponding communications device.

Disclosed herein is a system for drilling in a multilayer printed circuit board. The system includes a source of electromagnetic radiation configured to transmit a measurement pulse in open air to a workpiece, an anode, a resettable electric charge sensor (ECS), operably connected to the anode, and a control unit, configured to receive at least one value indicative of the quantity of at least part of charged molecules received at the anode and determine a second value indicative of the quantity of charged molecules received at the anode that were derivative of emitted electrons responsive to the measurement pulse.

A method may include obtaining a printed circuit board (PCB) that includes a set of vias that include a set of stub regions. The PCB may include a set of layers perpendicular to the set of vias. The set of layers may include a signal layer and a ground layer. The ground layer may be located between the set of stub regions and the signal layer. The method may include drilling to remove at least a portion of a stub region of a via of the set of vias. The method may include performing an electrical test to determine whether a sliver of conductive material is included within the via after drilling to remove the at least a portion of the stub region of the via.

A printed circuit board which improves the peel strength of a wiring pattern formed at a cavity bottom portion while enabling connection between an electronic component inside a cavity and a circuit outside the cavity to be performed at the cavity bottom portion, includes a cavity in a partial region of a multilayer substrate laminated with an insulating resin layer and an electrical conductor layer on a bottom layer of an insulating resin substrate. The cavity opens on a side of the insulating resin substrate, penetrates the insulating resin substrate, and includes a surface of the insulating resin layer as a bottom surface. The electrical conductor layer has a surface, the surface having a height equivalent to a height of the surface of the insulating resin layer and being embedded in the insulating resin layer in a manner to form a portion of the bottom surface.

A printed circuit board includes a top conducting layer, an escaping layer, one or more first reference layers interposed between the top conducting layer and the escaping layer, and a second reference layer disposed under the escaping layer. The top conducting layer includes two connecting pads for receiving a pair of differential signals. A pair of vias are provided to extend vertically to penetrate the one or more first reference layers, the escaping layer, and the second reference layer. The vias connects the top conducting layer with the escaping layer. Each of the one or more first reference layers includes a continuous via void surrounding the pair of vias. The second reference layer includes two round via voids each surrounding one of the vias. The second reference layer includes a conductive film disposed between the two round via voids.

A method is provided for modifying a via from a PCB including a plurality of subassemblies comprising a plurality of layers. The method may include drilling a via of the PCB to form a through-hole to remove an unwanted material in the via of the PCB. The method may also include depositing a carbon-based material over an inner wall of the through-hole. The method may further include back drilling a first portion of the through-hole by a drill from the top of the PCB to form a first blind via. The method may also include selectively plating a conductive material over the carbon-based material to form a plated through-hole.

Disclosed herein is a method of drilling in a multilayer printed circuit board. The method includes drilling a one hole; directing electromagnetic radiation having at least one wavelength with higher energy than a work-function the metal layer toward the hole, and thus causing the metal layer to emit free electrons; and measuring the quantity or intensity of electrically charged particles derived from the emitted free electrons, to detect the extent of exposure or disappearance of the metal layer during drilling.

An electronic device includes a printed circuit board (PCB). The PCB includes first and second grids disposed at a top surface and a bottom surface of the PCB, respectively. Each grid includes a plurality of footprint pins, and a plurality of vias extending through the PCB to the top and bottom surfaces. Each footprint pin includes a connecting end and a free end that opposes the connecting end. Each via includes a contact end located at one of grids and is in electrical contact with the connecting end of one of the footprint pins, and each via further includes a non-contact end that is located at the other of the grids and is not in electrical contact with any of the footprint pins. First and second connectors are mounted to the PCB top and bottom surfaces and connect with the footprint pins of the first and second grids.