A working machine for a board including a working device that selectively performs work for mounting conductive balls on a circuit board by a ball holder and work for transferring viscous fluid onto the circuit board by transfer pins, and a tray in which the viscous fluid is stored, when the conductive balls are to be mounted on the circuit board, the viscous fluid being transferred onto the circuit board by the transfer pins and the conductive balls having been immersed in the viscous fluid are mounted on the transferred viscous fluid. Accordingly, the conductive balls can be fixed onto the circuit board by the viscous fluid, which is transferred onto the circuit board by the transfer pins, and the viscous fluid that adheres to the conductive balls due to the immersion of the conductive balls in the viscous fluid.

A soldering alloy includes an alloy composition consisting of 13-22 mass % of In, 0.5-2.8 mass % of Ag, 0.5-5.0 mass % of Bi, 0.002-0.05 mass % of Ni, and a balance Sn. A soldering alloy, a soldering paste, a preform solder, a soldering ball, a wire solder, a resin flux cored solder and a solder joint, each of which is composed of the soldering alloy. An electronic circuit board and a multi-layer electronic circuit board joined by using the solder joint.

A manufacturing method of a metal bump structure is provided. A driving base is provided. At least one pad and an insulating layer are formed on the driving base. The pad is formed on an arrangement surface of the driving base and has an upper surface. The insulating layer covers the arrangement surface of the driving base and the pad, and exposes a part of the upper surface of the pad. A patterned metal layer is formed on the upper surface of the pad exposed by the insulating layer, and extends to cover a part of the insulating layer. An electro-less plating process is performed to form at least one metal bump on the patterned metal layer. A first extension direction of the metal bump is perpendicular to a second extension direction of the driving base.

A process of fabricating a circuit includes providing a first sheet of dielectric material including a first top surface having at least one first conductive trace and a second sheet of dielectric material including a second top surface having at least one second conductive trace, depositing a first solder bump on the at least one first conductive trace, applying the second sheet of dielectric material to the first sheet of dielectric material with bonding film sandwiched in between, bonding the first and second sheets of dielectric material to one another, and providing a conductive material to connect the first solder bump on the at least one first conductive trace to the at least one second conductive trace.

A method of manufacturing a chip assembly comprises joining an in-process unit to a printed circuit board; reflowing a bonding material disposed between and electrically connecting the in-process unit with the printed circuit board, the bonding material having a first reflow temperature; and then joining a heat distribution device to the plurality of semiconductor chips using a thermal interface material (“TIM”) having a second reflow temperature that is lower than the first reflow temperature. The in-process unit further comprises a substrate having an active surface, a passive surface, and contacts exposed at the active surface; an interposer electrically connected to the substrate; a plurality of semiconductor chips overlying the substrate and electrically connected to the substrate through the interposer, and a stiffener overlying the substrate and having an aperture extending therethrough, the plurality of semiconductor chips being positioned within the aperture.

3D electrical integration is provided by connecting several component carriers to a single substrate using contacts at the edges of the component carriers making contact to a 2D contact array (e.g., a ball grid array or the like) on the substrate. The resulting integration of components on the component carriers is 3D, thereby providing much higher integration density than in 2D approaches.

A flux resin composition contains: 60-80% by weight of an epoxy resin; 0.01-2% by weight of an imidazole compound; 1-5% by weight of a thixo agent; 4-20% by weight of an activator; and 7-30% by weight of a phenolic compound. The epoxy resin contains at least one resin selected from the group consisting of naphthalene type epoxy resins, biphenyl aralkyl type epoxy resins, trisphenol methane type epoxy resins, biphenyl type epoxy resins, and dicyclopentadiene type epoxy resins. Content of the at least one resin falls within a range from 15% by weight to 40% by weight with respect to a total weight of the flux resin composition. The phenolic resin is liquid and contains a phenol novolac.

An apparatus is provided which comprises: a cavity made in a substrate of a printed circuit board (PCB); a plurality of solder balls embedded in the cavity; and a horizontal trace within the substrate, wherein the horizontal trace is partially directly under the plurality of solder balls and is coupled to the plurality of solder balls and another trace or via in the substrate such that a substrate region under the plurality of solder balls is independent of a stop layer under the cavity.

A printed circuit board connector for orthogonal mating of two or more printed circuit boards. The connector utilizes interior perimeter trace connections of a main printed circuit board and internal trace connections of a mating printed circuit board in conjunction with external trace connections. The main board may utilize surface connections, where both external trace connections and internal trace connections are exposed on a surface of the main board to couple to the mating board. The main board may include a slot or pocket, allowing for the partial insertion of the mating board into the main board, with internal trace connections disposed within the slot or pocket. The slot or pocket may extend through the main board, such that the internal trace connections are disposed along a side of the pocket to couple with corresponding internal trace connections of the mating board.

A substrate and a method for manufacturing the substrate. The substrate is suitable for mounting at least one semiconductor die onto a printed circuit board. The substrate comprises two opposing stacks, with each stack comprising alternating layers of copper and electrically insulating film. The film and the copper have different co-efficients of thermal expansion, allowing the warpage behaviour of the substrate to be controlled by providing the substrate with different film thicknesses between the opposing stacks.