The present invention provides a process and a structure of forming conductive vias using a light guide. In an exemplary embodiment, the process includes providing a via in a base material in a direction perpendicular to a plane of the base material, applying a photoresist layer to an interior surface of the via, inserting a light guide into the via, exposing, by the light guide, a portion of the photoresist layer to light, thereby resulting in an exposed portion of the photoresist layer and an unexposed portion of the photoresist layer, removing a portion of the photoresist layer, and plating an area of the via, where the photoresist has been removed, with a metal, thereby resulting in a portion of the via plated with metal and a portion of the via not plated with metal.

A manufacturing method of a circuit board and a stamp are provided. The method includes: forming a circuit pattern and a dielectric layer on a dielectric substrate; forming a conductive via in the dielectric layer; forming a thermal-sensitive adhesive layer on the dielectric layer; forming a photoresist material layer on the thermal-sensitive adhesive layer; imprinting the photoresist material layer using a stamp, wherein a first conductive layer is disposed on the surface of the pressing side of the stamp, a second conductive layer is disposed on the surface of the other portions; applying a current to the stamp; removing the stamp and the photoresist material layer and the thermal-sensitive adhesive layer below the pressing side to form a patterned photoresist layer and thermal-sensitive adhesive layer; forming a patterned metal layer on the region exposed by the patterned photoresist layer; removing the patterned photoresist layer and thermal-sensitive adhesive layer.

A manufacturing method of a circuit board including the following steps is provided. A carrier substrate is provided. A patterned photoresist layer is formed on the carrier substrate. An adhesive layer is formed on the top surface of the patterned photoresist layer. A dielectric substrate is provided. A circuit pattern and a dielectric layer covering the circuit pattern are formed on the dielectric substrate, wherein the dielectric layer has an opening exposing a portion of the circuit pattern. The adhesive layer is adhered to the dielectric layer in a direction that the adhesive layer faces of the dielectric layer. The carrier substrate is removed. A patterned metal layer is formed on a region exposed by the patterned photoresist layer. The patterned photoresist layer is removed. The adhesive layer is removed.

A manufacturing method of a circuit board including the following steps is provided. A carrier substrate is provided. A patterned photoresist layer is formed on the carrier substrate. An adhesive layer is formed on the top surface of the patterned photoresist layer. A dielectric substrate is provided. A circuit pattern and a dielectric layer covering the circuit pattern are formed on the dielectric substrate, wherein the dielectric layer has an opening exposing a portion of the circuit pattern. The adhesive layer is adhered to the dielectric layer in a direction that the adhesive layer faces of the dielectric layer. The carrier substrate is removed. A patterned metal layer is formed on a region exposed by the patterned photoresist layer. The patterned photoresist layer is removed. The adhesive layer is removed.

A method of producing a wired circuit board including an insulating layer and a conductive pattern, including: (1), an insulating layer having an inclination face, (2), a metal thin film provided at least on the inclination face, (3), a photoresist provided on the surface of the metal thin film, (4), a light shield portion of a photomask disposed so that a first portion, where the conductive pattern is to be provided in the photoresist, is shielded from light, and the photoresist is exposed to light through the photomask, (5), the first portion of the photoresist is removed to expose the metal thin film corresponding to the first portion, and (6), the conductive pattern is provided on the surface of the metal thin film exposed from the photoresist.

A method of producing a wired circuit board including an insulating layer and a conductive pattern, including: (1), an insulating layer having an inclination face, (2), a metal thin film provided at least on the inclination face, (3), a photoresist provided on the surface of the metal thin film, (4), a light shield portion of a photomask disposed so that a first portion, where the conductive pattern is to be provided in the photoresist, is shielded from light, and the photoresist is exposed to light through the photomask, (5), the first portion of the photoresist is removed to expose the metal thin film corresponding to the first portion, and (6), the conductive pattern is provided on the surface of the metal thin film exposed from the photoresist.

A liquid solder resist composition contains a carboxyl group-containing resin, a photopolymerizable compound containing at least one compound selected from a group consisting of a photopolymerizable monomer and a photopolymerizable prepolymer, a photopolymerization initiator, a titanium dioxide, and a compound having a cyclic ether skeleton. The titanium dioxide contains both of a rutile titanium dioxide manufactured by a sulfuric acid method and a rutile titanium dioxide manufactured by a chlorine method.

An apparatus for fabricating an electrode structure includes a high voltage unit, a plating material part facing the high voltage unit, and a transfer roll to which a negative voltage is applied. The high voltage unit includes a high voltage roll, and an insulating sheath configured to cover a surface of the high voltage roll. The high voltage roll is applied with a voltage of about 1 kV to about 100 kV, the plating material part is applied with a positive voltage, and the high voltage unit and the transfer roll rotate.

The present invention provides a process and a structure of forming conductive vias using a light guide. In an exemplary embodiment, the process includes providing a via in a base material in a direction perpendicular to a plane of the base material, applying a photoresist layer to an interior surface of the via, inserting a light guide into the via, exposing, by the light guide, a portion of the photoresist layer to light, thereby resulting in an exposed portion of the photoresist layer and an unexposed portion of the photoresist layer, removing a portion of the photoresist layer, and plating an area of the via, where the photoresist has been removed, with a metal, thereby resulting in a portion of the via plated with metal and a portion of the via not plated with metal.

A piezochromic stamp is provided, wherein when a pressing side of the piezochromic stamp is subjected to a pressure, a light transmittance effect of the pressing side is changed from allowing a light having a specific wavelength to pass through to blocking the light having the specific wavelength, or the light transmittance effect of the pressing side is changed from blocking the light having the specific wavelength to allowing the light having the specific wavelength to pass through.