A method for producing a panel with integrated conductor tracks and electronic components. The panel includes a panel body, wherein the panel body is in particular a sandwich structure, and a membrane. The membrane is connected to the panel body and has integrated conductor tracks and electronic components. At the beginning of the method, an operation for attaching the conductor tracks and the electronic components to the membrane is provided. The subsequent step includes an operation for connecting the membrane, fitted with the conductor tracks and the electronic components, to the panel body.

A composite circuit board includes a flexible board, rigid boards, adhesive layers, and protection glue; the adhesive layers are sandwiched between the rigid boards and the flexible board and used for bonding the rigid boards and the flexible board; the rigid boards are provided with step slots passing through the rigid boards; the adhesive layers are provided with through slots passing through the adhesive layers; the step slots and the through slots are communicated with each other to form a thinning recess; the thinning recess exposes the flexible board; and the protection glue covers steps of the thinning recess and at least a portion of the exposed area of the flexible board.

A circuit board structure includes a first sub-board including a plurality of circuit patterns, a second sub-board including a plurality of pads, and a connecting structure layer having a plurality of through holes and including an insulating layer, first and second adhesive layers, and a plurality of conductive blocks. The first adhesive layer is directly connected to the first sub-board. The second adhesive layer is directly connected to the second sub-board. The through holes penetrate through the first adhesive layer, the insulating layer, and the second adhesive layer. The conductive blocks are located in the through holes. An upper surface and a lower surface of each conductive block are respectively lower than a first surface of the first adhesive layer and a second surface of the second adhesive layer relatively away from the insulating layer. Each circuit pattern contacts the upper surface, and each pad contacts the lower surface.

The present application relates to the technical field of circuit board fabricating, and provides a method for fabricating an asymmetric board, the method includes fabricating a master board, fabricating a second sub-board, thermal compression bonding the master board and the second sub-board, and milling a finished board; further includes at least one of the following three steps: laying copper on the connection positions of the master board except for the second copper layer of an outermost layer to obtain laying copper area, digging copper on the connection positions of the third copper layer, and after the step of milling the finished board, on each of the impositions, performing depth control milling at the connection positions from a side of the second sub-board on each imposition to obtain a depth control groove.

A method for manufacturing a circuit board, includes obtaining a second laminated body by laminating, in this order, an uncured second insulating substrate and a resin film on a second surface opposite to a first surface of a cured first insulating substrate of a first laminated body, and performing thermocompression bonding thereon. The first laminated body includes the first insulating substrate and a metal layer that is formed into a pattern shape on the first surface of the first insulating substrate. A third laminated body is obtained by forming a hole that reaches the metal layer, in the resin film, the second insulating substrate, and the first insulating substrate, from a resin film side of the second laminated body, filling conductive paste into the hole, and then peeling off the resin film. Thermocompression bonding is performed by stacking one third laminated body and another third laminated body.

A multilayer structure includes a first insulating layer including a first body of an anodized oxide material, a first via conductor penetrating through the first body, and a first internal wiring layer electrically connected to the first via conductor, a second insulating layer including a second body of the anodized oxide material, a second via conductor penetrating through the second body, and a second connection pad electrically connected to the second via conductor, and a solder hump provided on one of the first internal wiring layer and the second connection pad and between the first insulating layer and the second insulating layer. The first via conductor, the first internal wiring layer, the second connection pad, and the second via conductor are electrically connected to each other through the solder bump.

A circuit carrier includes a substrate, a first build-up circuit structure, a second build-up circuit structure, a fine redistribution structure and at least one conductive through hole. The substrate has a top surface and a bottom surface opposite to each other. The first build-up circuit structure is disposed on the top surface of the substrate and electrically connected to the substrate. The second build-up circuit structure is disposed on the bottom surface of the substrate and electrically connected to the substrate. The fine redistribution structure is directly attached on the first build-up circuit structure, wherein a line width and a line spacing of the fine redistribution structure are smaller than those of the first build-up circuit structure. The conductive through hole penetrates the fine redistribution structure and a portion of the first build-up circuit structure and is electrically connected to the fine redistribution structure and the first build-up circuit structure.

A printed circuit board includes: a first multilayer substrate including first and second vias adjacent to each other in a stacking direction of the printed circuit board; a second multilayer substrate disposed on the first multilayer substrate in the stacking direction and including third and fourth vias adjacent to each other in the stacking direction; and an adhesive layer connecting respective one surfaces of the first and second multilayer substrates to each other. Each of the first to fourth vias has one surface and the other surface facing the one surface, the one surface being closer to the adhesive layer than the other surface, and the one surface having a larger transverse cross-sectional area than the other surface.

A multilayer substrate and a manufacturing method thereof are disclosed. The multilayer substrate includes two or more dielectric layers laminated in sequence; a public line disposed at a top or bottom dielectric layer of the two or more dielectric layers; and two or more first through hole pillars respectively each embedded in a respective one of the dielectric layers, and the first through hole pillars are connected in cascade and then connected with the public line.

A method for manufacturing a structure for embedding and packaging multiple devices by layer includes preparing a polymer supporting frame, mounting a first device in a first device placement mouth frame to form a first packaging layer, forming a first circuit layer and a second circuit layer, forming a second conductive copper pillar layer and a second sacrificial copper pillar layer, forming a second insulating layer on the first circuit layer, and forming a third insulating layer on the second circuit layer, forming a second device placement mouth frame vertically overlapped with the first device placement mouth frame, mounting a second device and a third device in the second device placement mouth frame to form a second packaging layer, forming a third circuit layer on the second insulating layer. A terminal of the second device and a terminal of the third device are respectively communicated with the third circuit layer.