An electronic device including a first conductive element, a second conductive element, a substrate, and a conductor is provided. The first conductive element has a first region. The substrate has a through hole. The first through hole is disposed between the first conductive element and the second conductive element. The conductor electrically connects the first conductive element to the second conductive element through the through hole. The through hole is partially surrounded by the first region.

Provided is a method for forming a through-hole including: forming a laminated body including a fluororesin layer having a first main surface and a second main surface, a first adhesive layer, a first reinforcing resin layer and a first conductor layer provided on the first main surface, a second adhesive layer, a second reinforcing resin layer and a second conductor layer provided on the second main surface; forming an opening in the first conductor layer and irradiating the opening with a laser beam to form a bottomed conduction hole with the second conductor layer exposed on a bottom surface of the conduction hole, wherein a thermal decomposition temperature of the second cured adhesive layer is lower than those of the first reinforcing resin layer and the second reinforcing resin layer, and a thickness of the second cured adhesive layer is 10 μm or more and 200 μm or less.

A board-to-board connecting structure which adds no significant thickness to a single printed circuit board includes a first circuit board and a second circuit board. The first circuit board includes first circuit substrate, adhesive layer, and second circuit substrate. The first circuit substrate includes first base layer, first inner wiring layer with first pad, and first outer wiring layer defining a receiving space. The second circuit substrate includes insulating layer and two second outer wiring layers. A conductive via in the second circuit substrate connects the two second outer wiring layers. The second circuit board includes second base layer and also two third outer wiring layers each with a second pad. The second circuit board is laterally disposed in the receiving space and one second pad connects to the conductive via and the other to the first pad.

In one embodiment, a printed circuit board includes a first circuit board portion comprising a set of first conducting layers and one or more plated through hole (PTH) vias formed through the first conducting layers and a second circuit board portion comprising a set of second conducting layers. The second circuit board portion has an area less than an area of the first circuit board portion, and the second circuit board portion is coupled to the first circuit board portion via a laminate layer such that the first and second conducting layers are parallel with one another. The printed circuit board further includes one or more PTH vias formed through the first and second conducting layers in an area of the printed circuit board where the first and second circuit board portions overlap.

A probe card testing device includes a first sub-circuit board, a second sub-circuit board, a connecting structure layer, a fixing plate, a probe head and a plurality of conductive probes. The first sub-circuit board is electrically connected to the second sub-circuit board by the connecting structure layer. The fixing plate is disposed on the second sub-circuit board and includes an opening and an accommodating groove. The opening penetrates the fixing plate and exposes a plurality of pads on the second sub-circuit board. The accommodating groove is located on a side of the fixing plate relatively far away from the second sub-circuit board and communicates with the opening. The probe head is disposed in the accommodating groove of the fixing plate. The conductive probes are set on the probe head and in the opening of the fixing plate. One end of the conductive probes is in contact with the corresponding pads, respectively.

A circuit board structure includes a first sub-circuit board, a second sub-circuit board, and a third sub-circuit board. The first sub-circuit board has an upper surface and a lower surface opposite to each other, and includes at least one first conductive through hole. The second sub-circuit board is disposed on the upper surface of the first sub-circuit board and includes at least one second conductive through hole. The third sub-circuit board is disposed on the lower surface of the first sub-circuit board and includes at least one third conductive through hole. At least two of the first conductive through hole, the second conductive through hole, and the third conductive through hole are alternately arranged in an axial direction perpendicular to an extending direction of the first sub-circuit board. The first sub-circuit board, the second sub-circuit board, and the third sub-circuit board are electrically connected to one another.

A component carrier includes i) a first layer stack having a first electrically conductive layer structure and/or at least one first electrically insulating layer structure, ii) a component embedded in the first layer stack, iii) a second layer stack having at least one second electrically conductive layer structure and/or at least one second electrically insulating layer structure, and iv) a thermally conductive block embedded in the second layer stack. Hereby, the first layer stack and the second layer stack are connected with each other so that a thermal path from the embedded component via the thermally conductive block up to an exterior surface of the component carrier has a minimum thermal conductivity of at least 7 W/mK, in particular at least 40 W/mK. Further, a method of manufacturing the component carrier is described.

In a preparatory process of a method of manufacturing a multilayer substrate, an insulating substrate is prepared, with a conductor pattern formed only on one surface of the insulating substrate. At that time, the conductor pattern is constituted of the Cu element, a Ni layer is formed on the surface of the conductor pattern that is on the side of the insulating substrate. In a first forming process, a via hole having the conductor pattern as the bottom thereof is formed in the insulating substrate. At that time, the Ni layer that is in the area of the bottom is removed. In a filling process, a conductive paste is filled in the interior of the via hole. In a second forming process, a stacked body is formed by stacking a plurality of the insulating substrates. In a third forming process, the stacked body is heated while being subjected to pressure.

A carbene-coated metal foil is produced by applying an N-heterocyclic carbene (NHC) compound to one or more surfaces of a metal foil (e.g., an electrodeposited copper foil having a surface that is smooth and non-oxidized). The NHC compound contains a matrix-reactive pendant group that includes at least one of a vinyl-, allyl-, acrylic-, methacrylic-, styrenic-, amine-, amide- and epoxy-containing moiety capable of reacting with a base polymer (e.g., a vinyl-containing resin such as a polyphenylene oxide/triallyl-isocyanurate (PPO/TAIC) composition). The NHC compound may be synthesized by, for example, reacting a halogenated imidazolium salt (e.g., 1,3-bis(4-bromo-2,6-dimethylphenyl)-4,5-dihydro-1H-imidazol-3-ium chloride) and an organostannane having a vinyl-containing moiety (e.g., tributyl(vinyl)stannane) in the presence of a palladium catalyst. In some embodiments, an enhanced substrate for a printed circuit board (PCB) is produced by laminating the carbene-coated metal foil to a substrate that includes glass fiber impregnated with the base polymer.

Disclosed are a hole connecting layer manufacturing method, a circuit board manufacturing method and a circuit board. The hole connecting layer manufacturing method comprises: adhering a first insulating dielectric layer, used for laminating and filling, to a daughter board; laminating and solidifying the first insulating dielectric layer on the daughter board; adhering a second insulating dielectric layer, used for laminating and filling, to the first insulating dielectric layer which has been laminated and solidified; manufacturing a first receiving hole on the first insulating dielectric layer and a second receiving hole on the second insulating dielectric layer, wherein the first receiving hole and the second receiving hole are provided vertically opposite to each other; filling both the first receiving hole and the second receiving hole with a conductive medium to complete manufacturing of the hole connecting layer.