Provided is a current sensing device including: a laminate having a plurality of insulating layers laminated therein; a current sensing element provided in an inner layer of the laminate; a current wire configured to flow current to the current sensing element, the current wire being provided with respect to the current sensing element via an interlayer insulating layer; a plurality of current vias configured to connect the current sensing element and the current wire so as to penetrate through the interlayer insulating layer; and a voltage sensing via configured to obtain a voltage drop in the current sensing element, the voltage sensing via being electrically connected to the current sensing element.

In a semi-finished product for the production of a printed circuit board, the semi-finished product comprising a plurality of having multiple insulating layers of a prepreg material and conductive layers (2, 2′) of a conductive material and further comprising having at least one electronic component embedded in at least one insulating layer the at least one electronic component is attached to a corresponding conductive layer by the aid of an Anisotropic Conductive Film and the Anisotropic Conductive Film as well as the prepreg material are in an unprocessed state. The method for producing a printed circuit board comprises the following steps: Providing at least one conductive layer (2), Applying an Anisotropic Conductive Film on the conductive layer, Affixing at least one electronic component on the Anisotropic Conductive Film, Embedding the electronic component in at least one insulating layer of prepreg material to obtain a semi-finished product, Laminating the semi-finished product to process the prepreg material and the Anisotropic Conductive Film.

A method for producing a printed circuit board (13, 15, 16) with multilayer subareas in sections, characterized by the following steps: a) providing at least one conducting foil (1, 1′) and application of a dielectric insulating foil (3, 3′) to at least one subarea of the conducting foil; b) applying a structure of conducting paths (4, 4′) to the insulating layer (3, 3′); c) providing one further printed circuit board structure; d) joining of the further printed circuit board structure with the conducting foil (1, 1′) plus insulating layer (3, 3′) and conducting paths (4, 4′) by interposing a prepreg layer (5, 85; 18, 18′), and e) laminating the parts joined in step d) under pressing pressure and heat; and a printed circuit board produced according to this method.

An antenna device includes a resin multilayer board in which a plurality of resin sheets are stacked, and a coil conductor provided in the resin multilayer board. A plurality of line portions of the coil conductor are provided on a lower surface of the resin sheet. When a magnetic material core is preliminarily pressure-bonded to the resin sheet, the magnetic material core is fractured along the line portions and cracks occur. Thus, the resin sheet with the magnetic material core in which the cracks have been formed is fully pressure-bonded together with the other resin sheets.

A component-embedded substrate includes a cavity including through-holes penetrating through resin sheets in a stacked body of resin sheets having flexibility. An electronic chip component including external electrodes is disposed in the cavity. The resin sheet on which the electronic chip component is located is provided with through-holes into which conductive pastes are filled. The resin sheet includes cut-away portions communicating with a through-hole and located at a distance from each other across the through-hole. When this stacked body is hot-pressed, the conductive pastes overflow from the through-holes. However, the overflowing conductive pastes enter the cut-away portions.

A component built-in substrate incorporates a chip capacitor in a multilayer substrate including laminated base material layers made of thermoplastic resin. The chip capacitor includes an uneven portion including a recessed portion and a projected portion on one side in a laminated direction. On one side of the chip capacitor in the multilayer substrate, a density of low fluid member with a melting point higher than a fluidization temperature of the base material layers is higher in a region overlapping the recessed portion of the chip capacitor than in a region overlapping the projected portion of the chip capacitor when viewed in the lamination direction.

An embedded chip substrate includes a first insulation layer, a core layer, a chip, a second insulation layer, a first circuit layer, and a second circuit layer. The core layer disposed on the first insulation layer has an opening that exposes a portion of the first insulation layer. The chip is adhered into a recess constructed by the opening and the first insulation layer. The second insulation layer is disposed on the core layer for covering the chip. The first circuit layer is disposed at the outer side of the first insulation layer located between the first circuit layer and the core layer. The second circuit layer is disposed at the outer side of the second insulation layer located between the second circuit layer and the core layer. The first circuit layer is electrically connected to the second circuit layer that is electrically connected to the chip.

Representative implementations of devices and techniques provide improved electrical access to components, such as chip dice, for example, disposed within layers of a multi-layer printed circuit board (PCB). One or more insulating layers may be located on either side of a spacer layer containing the components. The insulating layers may have apertures strategically located to provide electrical connectivity between the components and conductive layers of the PCB.

A method of making an electronic device includes forming a circuit layer on a liquid crystal polymer (LCP) substrate and having at least one solder pad. The method also includes forming an LCP solder mask having at least one aperture therein alignable with the at least one solder pad. The method further includes aligning and laminating the LCP solder mask and the LCP substrate together, then positioning solder paste in the at least one aperture. At least one circuit component may then be attached to the at least one solder pad using the solder paste.

A process for producing a backplane circuit board (20) having an internal face (142) adapted to be connected to connectors (13) of circuit boards (12) and an external face (143) adapted to be connected to an external connector (15), blind holes (146, 148) opening on the internal face (142) and external face (143) of the backplane circuit board (20), wherein bonding layers (31, 32) having zones (41, 42) cleared of material facing the blind holes are used between the printed circuits (21, 22, 23).