A modified fluororesin material containing a modified fluororesin which contains a tetrafluoroethylene unit, a modifying monomer unit based on a modifying monomer copolymerizable with tetrafluoroethylene, and a tertiary carbon atom. The tertiary carbon atom is present in an amount of 0.001 to 0.030 mol % of a total amount of the tetrafluoroethylene unit and the modifying monomer unit. The modified fluororesin material has a linear expansion coefficient at 20° C. to 200° C. that is 10% or more lower than that of a non-modified fluororesin material. The non-modified fluororesin material contains a tetrafluoroethylene unit and a modifying monomer unit based on a modifying monomer copolymerizable with tetrafluoroethylene and containing no tertiary carbon atom. Also disclosed is a material for a circuit board including the modified fluororesin material, a laminate for a circuit board, a circuit board, and a method for producing the modified fluororesin material.

By interposing a hard mask between a dielectric and photo-sensitive material it is possible to form fine via in the dielectric by dry etching without damaging the remaining surface of the dielectric.

A radiation curable inkjet ink comprising a polymerizable compound, a photoinitiator and a co-initiator, wherein the co-initiator is an aliphatic tertiary amine co-initiator or an aromatic co-initiator, the aromatic co-initiator selected from the group consisting of an amino substituted benzoic acid derivative, an amino substituted aromatic aldehyde and an amino substituted aromatic ketone, characterized in that the co-initiator comprises at least one functional group selected from the group consisting of an aliphatic thioether and an aliphatic disulfide.

A conductive network fabrication process is provided and includes filling a hole formed in a substrate with dielectric material, laminating films of the dielectric material on either side of the substrate, opening a through-hole through the dielectric material at the hole, depositing a conformal coating of dielectric material onto an interior surface of the through-hole and executing seed layer metallization onto the conformal coating in the through-hole to form a seed layer extending continuously along an entire length of the through-hole.

A method for modifying a portion of a substrate after production is described herein. The method can include diagnosing a circuit operation error causing a malfunction, identifying a first contact on the substrate, and connecting, electrically, the first contact to a second contact with at least one trace. The trace is done with a focused ion beam. The method can include diagnosing an error on an operative area of a post-manufacture circuit board causing a malfunction; introducing a metal precursor into a focused ion beam chamber; ionizing the metal precursor by contacting it with a gallium ion beam into a conductive metal and a further ion; depositing a first portion of a conductive metal onto a substrate to form a first trace; and forming the first trace between the operative area and a non-operative area thereby connecting the operative area and the non-operative area.

A conductive network fabrication process is provided and includes filling a hole formed in a substrate with dielectric material, laminating films of the dielectric material on either side of the substrate, opening a through-hole through the dielectric material at the hole, depositing a conformal coating of dielectric material onto an interior surface of the through-hole and executing seed layer metallization onto the conformal coating in the through-hole to form a seed layer extending continuously along an entire length of the through-hole.

The invention discloses a thin film transistor, a display panel and a method of fabricating the thin film transistor. The thin film transistor includes a substrate, a gate layer, a dielectric layer, an active layer, and a source/drain layer which are stacked in sequence from bottom to top; and a plurality of reinforcing portions are disposed on an upper surface of the gate layer, wherein the reinforcing portions are configured to increase an area of the upper surface of the gate layer, so as to increase an effective abutting area between the gate layer and the active layer, and reduce a width and a length of the thin film transistor, and reduce a parasitic capacitance of the thin film transistor.

The present invention discloses an ion beam lithography method based on an ion beam lithography system. The ion beam lithography system includes a roll-roll printer placed in a vacuum, and a medium-high-energy wide-range ion source, a medium-low-energy wide-range ion source and a low-energy ion source installed on the roll-roll printer. The ion beam lithography method includes: first coating a polyimide (PI) substrate with a dry film, etching the dry film according to a preset circuit pattern, then using the ion beam lithography system to deposit a wide-energy-range metal ion on the circuit pattern to form a film substrate, and finally stripping the dry film off the film substrate to obtain a printed circuit board (PCB).

A single-layer circuit board, multi-layer circuit board, and manufacturing methods therefor. The method for manufacturing the single-layer circuit board comprises the following steps: drilling a hole on a substrate, the hole comprising a blind hole and/or a through hole; on a surface of the substrate, forming a photoresist layer having a circuit negative image; forming a conductive seed layer on the surface of the substrate and a hole wall of the hole; removing the photoresist layer, and forming a circuit pattern on the surface of the substrate, wherein forming a conductive seed layer comprises implanting a conductive material below the surface of the substrate and below the hole wall of the hole via ion implantation, and forming an ion implantation layer as at least part of the conductive seed layer.

The present disclosure provides a method of fabricating an electrode structure. The method provides an electrically insulating substrate having a first surface, a second surface opposite the first surface, and a plurality of through-holes, each through-hole extending across a thickness of the insulating substrate. The method further comprises extruding a material sequentially or simultaneously through at least some of the through-holes resulting in a plurality of elongate electrically conductive elements extending through and protruding from the through-holes at the first surface of the electrically insulating substrate. In addition, the method comprises forming a plurality of electrically conductive regions at the second surface of the electrically insulating substrate. Each electrically conductive region is located at a respective through-hole, whereby the electrically conductive regions are electrically coupled to the elongate electrically conductive elements.