A single-layer circuit board, multi-layer circuit board, and manufacturing methods therefor. The method for manufacturing the single-layer circuit board (10) comprises the following steps: drilling a hole on a substrate (11), the hole comprising a blind hole and/or a through hole (S1); on a surface (12) of the substrate, forming a photoresist layer having a circuit negative image (S2); forming a conductive seed layer on the surface (12) of the substrate and a hole wall (19) of the hole (S3); removing the photoresist layer, and forming a circuit pattern on the surface (12) of the substrate (S4), wherein Step S3 comprises implanting a conductive material below the surface (12) of the substrate and below the hole wall (19) of the hole via ion implantation, and forming an ion implantation layer as at least part of the conductive seed layer.

A single-layer circuit board, multi-layer circuit board, and manufacturing methods therefor. The method for manufacturing the single-layer circuit board (10) comprises the following steps: drilling a hole on a substrate (11), the hole comprising a blind hole and/or a through hole (S1); on a surface (12) of the substrate, forming a photoresist layer having a circuit negative image (S2); forming a conductive seed layer on the surface (12) of the substrate and a hole wall (19) of the hole (S3); removing the photoresist layer, and forming a circuit pattern on the surface (12) of the substrate (S4), wherein Step S3 comprises implanting a conductive material below the surface (12) of the substrate and below the hole wall (19) of the hole via ion implantation, and forming an ion implantation layer as at least part of the conductive seed layer.

A component carrier and a method for manufacturing a component carrier are described. The component carrier has a carrier body with a plurality of electrically conductive layer structures and/or electrically insulating layer structures. At least a part of the component carrier is formed as a three-dimensionally printed structure.

A method of manufacturing an electrical component includes providing an electrically insulating substrate having an outer surface, applying a coated structure on the outer surface and irradiating the coated structure with an electron beam to form an electrical conductor on the substrate. The irradiating may include heating the coating layer to melt the coating layer to form the electrical conductor. The coating layer may have a low binder concentration and a high metal concentration. The irradiating may include vaporizing substantially all the binder leaving a substantially pure metallic layer to form the electrical conductor. The coating layer may be irradiated until non-metallic material of the coating layer is completely removed.

A substrate cover has a conductive frame body covering a surface circumference edge region and an upper circumference region of a substrate drawn with a charged particle beam, the conductive frame body comprising a notch portion provided at part of an inner circumference of the conductive frame body, and a recessed portion provided on the outer circumference side of the upper surface of the conductive frame body, such that the recessed portion is arranged adjacent to the notch portion in a direction of a frame width of the conductive frame body, and a conductive member provided on the recessed portion so as to pass through the notch portion to project inward to the inside of the frame of the conductive frame body, the conductive member comprising a contact portion electrically connected to the surface of the substrate, and a brim portion covering an upper portion of a gap.

A single-layer circuit board, multi-layer circuit board, and manufacturing methods therefor. The method for manufacturing the single-layer circuit board (10) comprises the following steps: drilling a hole on a substrate (11), the hole comprising a blind hole and/or a through hole (S1); on a surface (12) of the substrate, forming a photoresist layer having a circuit negative image (S2); forming a conductive seed layer on the surface (12) of the substrate and a hole wall (19) of the hole (S3); removing the photoresist layer, and forming a circuit pattern on the surface (12) of the substrate (S4), wherein Step S3 comprises implanting a conductive material below the surface (12) of the substrate and below the hole wall (19) of the hole via ion implantation, and forming an ion implantation layer as at least part of the conductive seed layer.

A method for directly writing metal traces on a wide range of substrate materials is disclosed. The method includes writing a pattern of particle-free metal-salt-based ink on the substrate followed by a plasma-based treatment to remove the non-metallic components of the ink and decompose its metal salt into pure metal. The ink is based on a multi-part solvent whose components differ in at least one of evaporation rate, surface tension, and viscosity, which improves the manner in which the ink is converted into its metal constituent via the plasma treatment. In some embodiments, a microplasma is used for post-treatment of the deposited ink, where the plasma properties are controlled to provide different material properties, such as porosity and effective resistivity, in different regions of the metal pattern.

To provide a curable composition for nanoimprinting that can form a cured product that has a sufficiently cured surface and is less prone to a pattern collapse defect even when the curable composition is cured by a photo-nanoimprint method at a low exposure dose. To provide a nanoimprint method for forming such a cured product. To provide a cured product that is less prone to a pattern collapse defect even when cured at a low exposure dose, a method for producing such a cured product, a method for manufacturing an optical component, a method for manufacturing a circuit board, and a method for manufacturing an electronic component.

A curable composition that satisfies the formula (1) in a cured state:

Er.sub.1/Er.sub.21.10 (1)

wherein Er.sub.1 denotes the surface reduced modulus (GPa) of a cured product of the curable composition, and Er.sub.2 denotes the internal reduced modulus (GPa) of the cured product.

To provide a curable composition for nanoimprinting that can form a cured product that has a sufficiently cured surface and is less prone to a pattern collapse defect even when the curable composition is cured by a photo-nanoimprint method at a low exposure dose. To provide a nanoimprint method for forming such a cured product. To provide a cured product that is less prone to a pattern collapse defect even when cured at a low exposure dose, a method for producing such a cured product, a method for manufacturing an optical component, a method for manufacturing a circuit board, and a method for manufacturing an electronic component. A curable composition that satisfies the formula (1) in a cured state:
Er.sub.1/Er.sub.21.10(1) wherein Er.sub.1 denotes the surface reduced modulus (GPa) of a cured product of the curable composition, and Er.sub.2 denotes the internal reduced modulus (GPa) of the cured product.

A circuit board comprising a substrate and a circuit trace. The substrate includes a surface etched via ion milling over a circuit area such that the surface has an increased roughness. The circuit trace forms portions of an electronic circuit and may be created from a thin conductive film deposited on the surface within the circuit area. The circuit trace adheres more strongly to the roughened substrate surface, which prevents the circuit trace from peeling or becoming delaminated from the substrate surface.