Patent classifications
H05K2203/107
METHOD FOR MANUFACTURING SEMICONDUCTOR PACKAGE STRUCTURE
A method for manufacturing a semiconductor package structure is provided. The method includes: (a) providing a semiconductor structure including a first device and a second device; (b) irradiating the first device by a first energy-beam with a first irradiation area; and (c) irradiating the first device and the second device by a second energy-beam with a second irradiation area greater than the first irradiation area of the first energy-beam.
Hard disk drive suspension pad pre-solder formation and guiding
A hard disk drive flexure assembly includes a metal substrate having a gap between a root side and a slider side, a base layer and a first conductive layer that each bridges the gap, and a plurality of electrical pads where the pads extend to the slider side of the flexure so as to positionally overlap with a slider end edge and corresponding slider electrical pads. Pre-solder bumps are formed on each pad. This configuration facilitates formation of a functional solder bridge between the flexure and the slider because the melted solder can readily spread on the extended flexure pad surface and reach the slider pad when the pre-solder bump is heated, as the pad material has higher solder wettability than that of a cover layer material. These techniques are especially relevant with narrow, high-density, small pitch electrical pads.
PATTERN TRANSFER SHEET, METHOD OF MONITORING PATTERN TRANSFER PRINTING, AND PATTERN TRANSFER PRINTING SYSTEM
Pattern transfer sheets, methods of monitoring pattern transfer printing, and pattern transfer printing systems are provided, for monitoring and adjusting laser illumination used for transferring paste patterns from trenches on the sheets onto a substrate such as electronic circuitry and/or solar cell substrates. Pattern transfer sheets comprise, outside the pattern, (i) trace mark(s) configured to receive the printing paste, aligned to the trenches and are wider than the width of the illuminating laser beam—to detect misalignment of paste release from within the trace mark(s) and/or (ii) working window marks configured to receive the printing paste, set at specified offsets with respect to specific trenches, with different working window marks set at different offsets—to correct the effective working window by adjusting the power of the laser beam.
Fiber optics printed circuit board assembly surface cleaning and roughening
The present disclosure generally relates to printed circuit boards or printed circuit board assemblies for fiber optic communications. In one example, an optoelectronic assembly may include a printed circuit board including a laser-roughened area, at least one optoelectronic component coupled to a surface of the printed circuit board, and an optical component attached to the printed circuit board. The coupling area may be defined by the optical component contacting the printed circuit board, and the laser-roughened area may be positioned entirely within the coupling area defined by the optical component contacting the printed circuit board.
Component carrier with blind hole filled with an electrically conductive medium and fulfilling a minimum thickness design rule
A component carrier with a stack including an electrically insulating layer structure and an electrically insulating structure has a tapering blind hole formed in the stack and an electrically conductive plating layer extending along at least part of a horizontal surface of the stack outside of the blind hole and along at least part of a surface of the blind hole. A minimum thickness of the plating layer at a bottom of the blind hole is at least 8 μm. A demarcation surface of the plating layer in the blind hole and facing away from the stack extends laterally outwardly from the bottom of the blind hole towards a lateral indentation and extends laterally inwardly from the indentation up to an outer end of the blind hole. An electrically conductive structure fills at least part of a volume between the plating layer and an exterior of the blind hole.
Method for manufacturing wiring board
A method for manufacturing a wiring board capable of improving adhesion between an underlayer and a seed layer. An electrically conductive underlayer is disposed on the surface of an insulating substrate and a seed layer containing metal is disposed on the surface of the underlayer to prepare a substrate with seed-layer. A diffusion layer in which elements forming the underlayer and seed layer are mutually diffused is formed between the underlayer and the seed layer, by irradiating the seed layer with a laser beam. A metal layer is formed on the surface of the seed layer by disposing a solid electrolyte membrane between an anode and the seed layer as a cathode and applying voltage between the anode and the underlayer. An exposed portion without the seed layer of the underlayer is removed from the insulating substrate.
Methods for printing solder paste and other viscous materials at high resolution
Systems and methods in which dot-like portions of a material (e.g., a viscous material such as a solder paste) are printed or otherwise transferred onto an intermediate substrate at a first printing unit, the intermediate substrate having the dot-like portions of material printed thereon is transferred to a second printing unit, and the dot-like portions of material are transferred from the intermediate substrate to a final substrate at the second printing unit. Optionally, the first printing unit includes a coating system that creates a uniform layer of the material on a donor substrate, and the material is transferred in the individual dot-like portions from the donor substrate onto the intermediate substrate at the first printing unit. Each of the first and second printing units may employ a variety of printing or other transfer technologies. The system may also include material curing and imaging units to aid in the overall process.
Core layer with fully encapsulated co-axial magnetic material around PTH in IC package substrate
Embodiments may include inductors with embedded magnetic cores and methods of making such inductors. In an embodiment, an integrated circuit package may include an integrated circuit die with a multi-phase voltage regulator electrically coupled to the integrated circuit die. In such embodiments, the multi-phase voltage regulator may include a substrate core and a plurality of inductors. The inductors may include a conductive through-hole disposed through the substrate core and a plugging layer comprising a dielectric material surrounding the conductive through-hole. In an embodiment, a magnetic sheath is formed around the plugging layer. In an embodiment, the magnetic sheath is separated from the plated through hole by the plugging layer. Additionally, a first layer comprising a dielectric material may be disposed over a first surface of the magnetic sheath, and a second layer comprising a dielectric material may be disposed over a second surface of the magnetic sheath.
Battery system with flexible printed circuit
A method for connecting a flexible printed circuit (FPC) to a battery module and a cell supervision circuit board (CSCB) is provided. The method includes: providing a coil of a continuous, strip-shaped FPC; unwinding a first section of the FPC from the coil, positioning the first section of the FPC over a first contact portion of the battery module, and welding a conductive structure of the FPC in the first section to the first contact portion of the battery module; unwinding a second section of the FPC from the coil, positioning the second section of the FPC over a contact pad of the CSCB, and welding the conductive structure of the FPC in the second section to the contact pad of the CSCB; and separating the first section and second section of the FPC from the coil of the FPC.
Architecture for chip-to-chip interconnection in semiconductors
A PCB bridge for interconnection of two or more semiconductor chips for data communication between the semiconductor chips includes a plurality of metal strips; and a dielectric material disposed in between the plurality of metal strips. The PCB bridge is employed in a vertical direction in a semiconductor module for interconnection of two or more semiconductor chips, the vertical direction of the PCB bridge provides a flexible impedance matching by adjusting the dielectric material and a trace width of the PCB bridge, and the vertical direction of the PCB bridge avoids signal reflections by matching the impedance to a source, and a trace length of the PCB bridge is limited by spacing in between two semiconductor chips which further limited inductance of the trace of the PCB bridge.