Patent classifications
H05K2203/1121
METHOD FOR BONDING PLASTIC COMPONENT TO PRINTED CIRCUIT BOARD
A method for bonding aplastic component to a printed circuit board includes the steps of: a) providing the plastic component, the printed circuit board, and at least one positioning member, b) disposing at least one welding layer, c) positioning the plastic component and the printed circuit board relative to each other, d) melting the at least one welding layer while the plastic component is maintained in a positioning position, and e) cooling the at least one welding layer while the plastic component is maintained in the positioning position.
IN-SITU WARPAGE MONITORING DURING SOLDER REFLOW FOR HEAD-IN-PILLOW DEFECT ESCAPE PREVENTION
Embodiments of the present invention are directed to an in-situ warpage monitoring system and method for preventing head-in-pillow (HIP) or other potential defect escapes during a solder reflow process. In a non-limiting embodiment of the invention, a product is passed through a reflow oven. The product can include a printed circuit board (PCB). An amount of warpage of the product is measured at one or more monitoring devices positioned along the reflow oven. Each measured amount of warpage is compared to a predetermined warpage limit. The product is sorted into one of a plurality of designated lots based on the comparison. The lots can include a pass lot, a fail lot, and a marginal pass lot.
Impedence Matching Conductive Structure for High Efficiency RF Circuits
The present invention includes a method of making a RF impedance matching device in a photo definable glass ceramic substrate. A ground plane may be used to adjacent to or below the RF Transmission Line in order to prevent parasitic electronic signals, RF signals, differential voltage build up and floating grounds from disrupting and degrading the performance of isolated electronic devices by the fabrication of electrical isolation and ground plane structures on a photo-definable glass substrate.
ELECTRONICS ENCAPSULATION THROUGH HOTMELT LAMINATION
Methods, devices, and systems for encapsulating a flexible electronic device with a waterproof layer are provided. In some embodiments, a manufacturing process is provided where a hotmelt layer is positioned over a flexible substrate that has at least one electronic component. Then, heat and/or pressure are applied to the hotmelt layer causing the hotmelt layer to flow around the at least one component to encapsulate the at least one component and form a waterproof layer. Various embodiments for forming the hotmelt layer and various embodiments of the flexible electronic device with the hotmelt layer are described herein.
METHOD OF MANUFACTURING SUBSTRATE FOR PRINTED CIRCUIT BOARD
According to one aspect of the present disclosure, a method of manufacturing a substrate for a printed circuit board, including an insulating base film and a metal layer that is layered on at least one surface side of the base film, includes: an application step of applying, to the at least one surface side of the base film, a dispersion liquid containing fine metal particles; a drying step of drying a coating film of the applied dispersion liquid; a sintering step of sintering the dried coating film by a far-infrared heater under a low oxygen atmosphere with an oxygen concentration of 600 ppm by volume or less; and a cooling step of cooling a layered structure of the sintered coating film and the base film under a low oxygen atmosphere with an oxygen concentration of 600 ppm by volume or less.
Method for producing a metal-ceramic substrate
A method for producing a metal-ceramic substrate includes attaching a metal layer to a surface side of a ceramic layer, the metal layer being structured into a plurality of metallization regions respectively separated from one another by at least one trench-shaped intermediate space to form conductive paths and/or connective surfaces and/or contact surfaces. The method further includes filling the at least one trench-shaped intermediate space with an electrically insulating filler material, and covering first edges of the metallization regions facing and adjoining the surface side of the ceramic layer in the at least one trench-shaped intermediate space, as well as at least one second edge of the metallization regions facing away from the surface side of the ceramic layer in the at least one trench-shaped intermediate space, by the electrically insulating filler material.
PLASMA ASHING OF COATED SUBSTRATES
A system for plasma etching or ashing a coating on a substrate includes a plasma chamber, a second electrode, a plasma source coupled to the plasma chamber, a substrate including a coating, and a plasma mask including at least one aperture. The plasma chamber includes a first electrode. The plasma mask is configured to cover the substrate while exposing selected surfaces of the substrate and coating through the at least one aperture. The first electrode and the second electrode are configured to initiate and maintain a plasma within the plasma chamber. The plasma source includes a gas.
Rapidly solidifying Pb-free Sn-Ag-Cu-Al or Sn-Cu-Al solder
A solder alloy includes Sn, optional Ag, Cu, and Al wherein the solder alloy composition together with the solder alloy superheat temperature and rapid cooling rate from the superheat temperature are controlled to provide a dispersion of fine hard CuAl intermetallic particles in an as-solidified solder alloy microstructure wherein the particles are retained even after multiple solder reflow cycles often used in modern electronic assembly procedures to provide a particle strengthening to the solder joint microstructure as well as exert a grain refining effect on the solder joint microstructure, providing a strong, impact- and thermal aging-resistant solder joint that has beneficial microstructural features and is substantially devoid of Ag.sub.3Sn blades.
SOLDER BONDING METHOD AND SOLDER JOINT
A solder bonding method that bonds, using a solder joint, an electrode of a circuit board to an electrode of an electronic component includes: depositing, on the electrode of the circuit board, an SnBi-based solder alloy with a lower melting point than a solder alloy deposited on the electrode of the electronic component; mounting the electronic component on the circuit board such that the SnBi-based solder alloy contacts the solder alloy on the electrode of the electronic component; heating the circuit board to a peak temperature of heating of 150 C. to 180 C.; holding the peak temperature of heating at a holding time of greater than 60 seconds and less than or equal to 150 seconds; and cooling, after the heating and to form the solder joint, the circuit board at a cooling rate greater than or equal to 3 C./sec.
MANUFACTURING METHOD OF ELECTRONIC DEVICE AND ELECTRONIC DEVICE
A manufacturing method of an electronic device including the following steps is provided. First, a first conductive layer is formed on a substrate. Next, a first insulating layer and a second conductive layer are formed on the first conductive layer. The first insulating layer is disposed between the second conductive layer and the first conductive layer, and the first insulating layer has a via exposing a part of the first conductive layer. An aspect ratio of the via of the first insulating layer is greater than 1, and at least part of a sidewall of the first insulating layer is covered by the second conductive layer.