A method of making a device patterned with one or more electrically conductive features includes depositing a conductive material layer over an electrically insulating surface of a substrate, depositing an anti-corrosive material layer over the conductive material layer, and depositing an etch-resist material layer over the anti-corrosive material layer. The etch-resist material layer may be deposited over the anti-corrosive material layer, and the anti-corrosive material layer forming a bi-component etch mask in a pattern resulting in covered portions of the conductive material layer and exposed portions of the conductive material layer, the covered portions being positioned at locations corresponding to one or more conductive features of the device. A wet-etch process is performed to remove the exposed portions of the conductive material layer from the electrically insulating substrate, and the bi-component etch mask is removed to expose the remaining conductive material. Systems and devices relate to devices with patterned features.

A circuit board includes: a metal core base material including a first main surface, a second main surface on an opposite side of the first main surface, a side surface, and a projection that projects from the side surface; an outer cover including a first insulation layer that covers the first main surface, a second insulation layer that covers the second main surface, and a third insulation layer that covers the side surface; a first wiring layer provided in the first main surface with the first insulation layer interposed between the first wiring layer and the first main surface; a second wiring layer provided in the second main surface with the second insulation layer interposed between the second wiring layer and the second main surface; and a sealing portion that is made of an insulation material embedded in the outer cover and covers an end surface of the projection.

A method of making a device patterned with one or more electrically conductive features includes depositing a conductive material layer over an electrically insulating surface of a substrate, depositing an anti-corrosive material layer over the conductive material layer, and depositing an etch-resist material layer over the anti-corrosive material layer. The etch-resist material layer may be deposited over the anti-corrosive material layer, and the anti-corrosive material layer forming a bi-component etch mask in a pattern resulting in covered portions of the conductive material layer and exposed portions of the conductive material layer, the covered portions being positioned at locations corresponding to one or more conductive features of the device. A wet-etch process is performed to remove the exposed portions of the conductive material layer from the electrically insulating substrate, and the bi-component etch mask is removed to expose the remaining conductive material. Systems and devices relate to devices with patterned features.

An etching composition for etching an electrically conductive layer structure for forming a conductor track is provided. The etching composition includes an etchant, a highly branched compound and optionally a solvent. In addition, a method of etching an electrically conductive layer structure, a conductor track, an arrangement of at least two conductor tracks, and a component carrier are provided.

In some embodiments, methods include drilling one or a plurality of PTHs with any industrial grade drill to fabricate holes with positive etch back, flooding the PTHs with a dilute solution of an acrylate monomer/oligomer containing an appropriate level of peroxide initiator, polymerizing the acrylate, and then rising the PTHs with the solvent used in the formulation of the acrylate material. In one embodiment, the printed circuit board may include a substrate comprising a plurality of metal layers separated by a plurality of insulating layers; a plurality of plated through holes formed in the substrate, each plated through hole comprising: recesses formed at each insulating layer, copper lands between the recesses, a polymer coating in each recess, and a metal layer lining the plated through hole.

The present invention is a method for manufacturing a multilayer wiring board having (1) a step of providing with a hole for a via hole, an overhang of a metal foil formed at an opening of the hole, and lower space formed between the overhang and an inside wall of the hole, by using a conformal method or a direct laser method; and (2) a step of filling in the hole by forming electrolytic filling plating layers within the hole and on the metal foil, wherein the filling-in of the hole by the formation of electrolytic filling plating layers in the step (2) is carried out by temporarily decreasing the electric current density of electrolytic filling plating in the middle of the electrolytic filling plating, and increasing it again.

A printed circuit board includes: an insulating layer; a plating seed layer disposed on the insulating layer; a circuit pattern layer disposed on the plating seed layer and formed of copper (Cu); and a surface treatment layer disposed on the circuit pattern layer and formed of gold (Au), wherein the circuit pattern layer includes a corner portion of an upper portion which has a curvature, and wherein the corner portion of the circuit pattern layer is a boundary surface between the top surface and a side surface of the circuit pattern layer, and the boundary surface has a concavely curved surface.

A semiconductor device according to the present invention includes a ceramic substrate, a plurality of circuit patterns arranged on a surface of the ceramic substrate, a semiconductor element arranged on an upper surface of at least one circuit pattern, and a sealing resin for sealing the ceramic substrate, the plurality of circuit patterns, and the semiconductor element, in which an undercut part is formed in opposed side surfaces of the circuit patterns adjacent to one another, the undercut part is configured such that an end of an upper surface of the circuit pattern protrudes outside the circuit pattern more than an end of a lower surface of the circuit pattern on the ceramic substrate, and the undercut part is also filled with the sealing resin.

The present invention is a method for manufacturing a multilayer wiring board having (1) a step of providing with a hole for a via hole from a metal foil for an upper layer wiring pattern to an inner layer wiring pattern by using a conformal method or a direct laser method, and (2) a step of forming a via hole by forming electrolytic filling plating layers in the hole for a via hole, wherein the formation of the electrolytic filling plating layers in the step (2) is carried out by repeating change in electric current density of temporarily decreasing the electric current density of electrolytic filling plating in the middle of the electrolytic filling plating and then increasing it again, two or more times before the electrolytic filling plating layers block an opening of the hole for a via hole.

A method of making a device patterned with one or more electrically conductive features includes depositing a conductive material layer over an electrically insulating surface of a substrate, depositing an anti-corrosive material layer over the conductive material layer, and depositing an etch-resist material layer over the anti-corrosive material layer. The etch-resist material layer may be deposited over the anti-corrosive material layer, and the anti-corrosive material layer forming a bi-component etch mask in a pattern resulting in covered portions of the conductive material layer and exposed portions of the conductive material layer, the covered portions being positioned at locations corresponding to one or more conductive features of the device. A wet-etch process is performed to remove the exposed portions of the conductive material layer from the electrically insulating substrate, and the bi-component etch mask is removed to expose the remaining conductive material. Systems and devices relate to devices with patterned features.