A method, apparatus and system for processing a composite waste source, such as e-waste, is disclosed. The composite waste source may comprise low-, moderate and high-melting point constituents, such as plastics, metals and ceramics. The composite waste source is heated to a first temperature zone, causing at least some of the low-melting point constituents to at least partially thermally transform. The composite waste source is subsequently heated to a second, higher, temperature zone, causing at least some of the moderate-melting point constituents to at least partially thermally transform. At least some of the at least partially thermally transformed constituents may be recovered. The method, apparatus and system disclosed may provide for the recovery and reuse of materials which would otherwise be sent to landfill or incinerated.

Integrated circuit (IC) package substrates having high density interconnects with a sputter seed layer containing a copper alloy, as well as related structures, devices, and methods, are disclosed herein. For example, in some embodiments, a package substrate may include a first dielectric layer, a sputter seed layer disposed on the first dielectric layer, wherein the seed layer includes a copper alloy, a patterned conductive layer disposed on the seed layer, and a second dielectric layer over the patterned conductive layer.

A multi-layer circuit board is formed multiple layers of a catalytic layer, each catalytic layer having an exclusion depth below a surface, where the cataltic particles are of sufficient density to provide electroless deposition in channels formed in the surface. A first catalytic layer has channels formed which are plated with electroless copper. Each subsequent catalytic layer is bonded or laminated to an underlying catalytic layer, a channel is formed which extends through the catalytic layer to an underlying electroless copper trace, and electroless copper is deposited into the channel to electrically connect with the underlying electroless copper trace. In this manner, traces may be formed which have a thickness greater than the thickness of a single catalytic layer.

A wiring circuit board assembly sheet is partitioned by a product region in which a plurality of wiring circuit boards serving as products are disposed in alignment and a margin region surrounding the product region with the margin region having a first area adjacent to the product region and a second area located at the opposite side of the product region with respect to the first area. The wiring circuit board assembly sheet includes a dummy wiring circuit board disposed in at least a portion of the first area and smaller than the wiring circuit board.

An electronic medical device is disclosed here. An exemplary embodiment of the medical device includes a printed circuit board assembly, a protective inner shell surrounding at least a portion of the printed circuit board assembly, and an outer shell surrounding at least a portion of the protective inner shell. The printed circuit board assembly has a printed circuit board, electronic components mounted to the printed circuit board, a battery mounted to the printed circuit board, and an interface compatible with a physiological characteristic sensor component. The protective inner shell is formed by overmolding the printed circuit board assembly with a first material having low pressure and low temperature molding properties. The outer shell is formed by overmolding the protective inner shell with a second material that is different than the first material.

Systems and methods for providing a soldered interface between a circuit board and a connector pin. The methods comprise: using a jet paste dispenser to apply first solder into a plated contact cavity formed in the circuit board; using a stencil screen printer to apply second solder (a) over the plated contact cavity which was at least partially filled with the first solder by the jet paste dispenser and (b) over at least a portion of a pad surrounding the plated contact cavity; inserting the connector pin in the plated contact cavity such that the connector pin passes through the second solder and extends at least partially through the first solder; and performing a reflow process to heat the first and second solder so as to create a solder joint between the circuit board and the connector pin.

A wiring board and a method of manufacturing the same are provided. The method includes the following steps. A substrate is provided. The substrate is perforated to form at least one through hole. A first conductive layer is integrally formed on a surface of the substrate and an inner wall of the through hole. An etch stop layer is formed on a portion of the first conductive layer on the surface of the substrate and another portion of the first conductive layer on the inner wall of the through hole. A second conductive layer is integrally formed on the etch stop layer and the first conductive layer on the inner wall of the through hole. A plug-hole column is formed by filling with a plugged-hole material in the through hole. The second conductive layer is removed. The etch stop layer is then removed.

A multi-layer circuit board is formed multiple layers of a catalytic layer, each catalytic layer having an exclusion depth below a surface, where the cataltic particles are of sufficient density to provide electroless deposition in channels formed in the surface. A first catalytic layer has channels formed which are plated with electroless copper. Each subsequent catalytic layer is bonded or laminated to an underlying catalytic layer, a channel is formed which extends through the catalytic layer to an underlying electroless copper trace, and electroless copper is deposited into the channel to electrically connect with the underlying electroless copper trace. In this manner, traces may be formed which have a thickness greater than the thickness of a single catalytic layer.

A method includes providing an electrically conductive layer structure on top of an electrically insulating layer structure, forming a window in the electrically conductive layer structure and removing material of the electrically insulating layer structure below the window by a first laser beam, and subsequently removing further material of the electrically insulating layer structure below the window by a second laser beam having a smaller size than a size of the window.

A method is disclosed for applying an electrical conductor to a solar cell, which comprises providing a flexible membrane with a pattern of groove formed on a first surface thereof, and loading the grooves with a composition comprising conductive particles. The composition is, or may be made, electrically conductive. Once the membrane is loaded, the grooved first surface of the membrane is brought into contact with a front or/and back of a solar cell. A pressure is then applied between the solar cell and the membrane(s) so that the composition loaded to the grooves adheres to the solar cell. The membrane(s) and the solar cell are separated and the composition in the groove is left on the solar cell surface. The electrically conductive particles in the composition are then sintered or otherwise fused to form a pattern of electrical conductor on the solar cell, the pattern corresponding to the pattern formed in the membrane(s).