H05K2203/173

Implementing embedded wire repair for PCB constructs

Methods and structures are provided for implementing embedded wire repair for printed circuit board (PCB) constructs. A repair wire layer is provided within the PCB stack with reference planes on opposite sides of the repair wire layer. When a repair connection is required, an appropriate plated through hole (PTH) is drilled to form the repair connection using the repair wire layer.

STRUCTURE OF MEMORY MODULE AND MODIFICATION METHOD OF MEMORY MODULE
20220087019 · 2022-03-17 ·

An improved memory module structure includes a printed circuit board, memory units disposed on the printed circuit board, and a connection interface disposed on the printed circuit board for connection with an electronic device. The printed circuit board includes a solder pad zone having solder pads electrically connected with the memory units and the connection interface. A conduction element is combined with the solder pad zone or at least one conductor line electrically connected, in the form of bridge connection, the solder pads, in order to have the solder pads electrically connected. A memory module modification method is also provided, including removing a register from an existing dual inline memory module to expose a solder pad zone, and disposing of a conduction element or arranging a conductor line to have the memory units and the connection interface of electrically connected to thereby form an improved memory module structure.

Post-production substrate modification with FIB deposition

A method for modifying a portion of a substrate after production is described herein. The method can include diagnosing a circuit operation error causing a malfunction, identifying a first contact on the substrate, and connecting, electrically, the first contact to a second contact with at least one trace. The trace is done with a focused ion beam. The method can include diagnosing an error on an operative area of a post-manufacture circuit board causing a malfunction; introducing a metal precursor into a focused ion beam chamber; ionizing the metal precursor by contacting it with a gallium ion beam into a conductive metal and a further ion; depositing a first portion of a conductive metal onto a substrate to form a first trace; and forming the first trace between the operative area and a non-operative area thereby connecting the operative area and the non-operative area.

METHOD FOR REPAIRING CONDUCTOR TRACKS

A method for modifying an elongate structure including providing a fluid deposited onto the substrate, the fluid containing a dispersion of electrically polarizable nanoparticles and applying an AC voltage across a portion of the elongate structure so as to cause an alternating electric current to pass through the narrow section such that a break in the elongate structure is formed at the narrow section, the break being defined between a first broken end and a second broken end of the elongate structure, and then cause, when the break is formed, an alternating electric field to be applied to the fluid such that a plurality of the nanoparticles contained in the fluid are assembled to form a continuation of the elongate structure extending from the first broken end towards the second broken end so as to join the first and second broken ends.

System Producing a Conductive Path on a Substrate
20210195756 · 2021-06-24 ·

A method of producing a conductive path on a substrate including depositing on the substrate a layer of material having a thickness in the range of 0.1 to 5 microns, including metal particles having a diameter in the range of 10 to 100 nanometers, employing a patterning laser beam to selectably sinter regions of the layer of material, thereby causing the metal particles to together define a conductor at sintered regions and employing an ablating laser beam, below a threshold at which the sintered regions would be ablated, to ablate portions of the layer of material other than at the sintered regions.

PYROTECHNIC ENERGY CONVERSION SYSTEM FOR EJECTION ASSEMBLY
20210179280 · 2021-06-17 · ·

An energy conversion system may comprise a substrate including a first conductive trace and a second conductive trace electrically isolated from the first conductive trace. A housing may be coupled to the substrate. An ignition compound may be located in the housing. A solder may be thermally coupled to the ignition compound such that ignition of the ignition compound melts the solder. The housing may be configured to output the solder onto the first conductive trace and the second conductive trace.

CONDUCTIVE PATTERN, METHOD FOR FORMING CONDUCTIVE PATTERN, AND DISCONNECTION REPAIRING METHOD
20210168942 · 2021-06-03 ·

Provided is a conductive pattern according to an embodiment of the present invention formed on a surface of an inorganic insulating material (12), the conductive pattern having a lower layer (16A) in direct contact with the surface of the inorganic insulating material (12), and a metal nanoparticle sintered material-containing layer (18A) formed on the lower layer (16A). The lower layer (16A) and the metal nanoparticle sintered material-containing layer (18A) are formed using, for example, an ultra-fine inkjet processing device.

RESISTIVE PCB TRACES FOR IMPROVED STABILITY
20210153353 · 2021-05-20 ·

A method of running a printed circuit board (PCB) trace on a PCB. The PCB comprising a plurality of PCB layers. The method comprising forming a conductive trace on at least one of the plurality of PCB layers; coupling a first portion of the conductive trace to a capacitor formed on at least one of the plurality of PCB layers; coupling a second portion, different from the first portion, of the conductive trace to a conductive material formed within a first via extending through two or more of the plurality of PCB layers; and configurably setting a length of a conductive path of the conductive trace according to a predetermined impedance. The capacitor is separated laterally in a plan view at a first distance from the first via. The length of the conductive trace in the plan view is greater than the first distance. The conductive path of the conductive trace of the length has the predetermined impedance.

STRUCTURE OF MEMORY MODULE AND MODIFICATION METHOD OF MEMORY MODULE
20230413436 · 2023-12-21 ·

An improved memory module structure includes a printed circuit board, memory units disposed on the printed circuit board, and a connection interface disposed on the printed circuit board for connection with an electronic device. The printed circuit board includes a solder pad zone having solder pads electrically connected with the memory units and the connection interface. A conduction element is combined with the solder pad zone or at least one conductor line electrically connected, in the form of bridge connection, the solder pads, in order to have the solder pads electrically connected. A memory module modification method is also provided, including removing a register from an existing dual inline memory module to expose a solder pad zone, and disposing of a conduction element or arranging a conductor line to have the memory units and the connection interface of electrically connected to thereby form an improved memory module structure.

CONDUCTIVE TRACE INTERCONNECTION TAPE

A conductive trace interconnect tape for use with a printed circuit board or a flexible circuit substrate comprises a top insulating layer, an electrically conductive layer, and a bottom insulating layer. The top insulating layer is formed from electrically insulating material and is configured to provide electrical isolation from electrically conductive objects that are positioned on top of the conductive trace interconnect tape. The electrically conductive layer is positioned underneath the top insulating layer. The electrically conductive layer is formed from electrically conductive material and includes electrical interconnect traces, electrical component pads, or electrically conductive planar portions. The bottom insulating layer is positioned underneath the electrically conductive layer. The bottom insulating layer is formed from electrically insulating material and is configured to provide electrical isolation from electrically conductive objects that are positioned on the printed circuit board or flexible circuit substrate.