A memory cell includes a first conductive line, a lower electrode, a carbon nano-tube (CNT) layer, a middle electrode, a resistive layer, a top electrode and a second conductive line. The first conductive line is disposed over a substrate. The lower electrode is disposed over the first conductive line. The carbon nano-tube (CNT) layer is disposed over the lower electrode. The middle electrode is disposed over the carbon nano-tube layer, thereby the lower electrode, the carbon nano-tube (CNT) layer and the middle electrode constituting a nanotube memory part. The resistive layer is disposed over the middle electrode. The top electrode is disposed over the resistive layer, thereby the middle electrode, the resistive layer and the top electrode constituting a resistive memory part. The second conductive line is disposed over the top electrode.

Provided are MXene-containing electrodes, display devices, electrochromic devices, and other optoelectronic devices, which devices can include transparent and/or colored MXene materials. In particular, MXenes can be used as transparent conducting electrodes based on their comparatively high electrical conductivity and high work function. An electrode, comprising: a substrate; a portion of MXene material disposed on the substrate; a hole-injection material disposed on the MXene material; an organic layer in electronic communication with the hole-injection material; and a conductor material in electronic communication with the hole-injection material.

Photovoltaic devices, and methods of fabricating photovoltaic devices. The photovoltaic devices may include a first electrode, at least one quantum dot layer, at least one semiconductor layer, and a second electrode. The first electrode may include a layer including Cr and one or more silver contacts.

A molecular electronic device (10) includes a framework of polynucleotides (3), one or more molecular electronic components (4) and one or more electrical contacts (7). The molecular electronic components and the electrical contacts are each connected to the plurality of polynucleotides such that the molecular electronic components and the electrical contacts are located with respect to the framework and with respect to each other. This forms a coupling between the electrical contacts and the molecular electronic components.

The disclosure provides a method of manufacturing an organic electronic device, including providing a layered device structure, the layered device structure including a plurality of electrodes and an electronically active region, said providing of the layered device structure including steps of providing an organic semiconducting layer, applying a structuring layer to the organic semiconducting layer, the structuring layer having a first region and a second region, the first region being covered by a layer material, applying a contact improving layer to the structuring layer by depositing at least one of an organic dopant material and an organic dopant-matrix material at least in the first region, depositing a layer material on the contact improving layer at least in the first region, and removing the structuring layer at least in the second region. Furthermore, an organic electronic device is provided.

A thin film transistor includes a gate electrode, a insulating medium layer and at least one Schottky diode unit. The at least one Schottky diode unit is located on a surface of the insulating medium layer. The at least one Schottky diode unit includes a first electrode, a semiconductor structure and a second electrode. The semiconductor structure comprising a first end and a second end. The first end is laid on the first electrode, the second end is located on the surface of the insulating medium layer. The semiconducting structure includes a nano-scale semiconductor structure. The second electrode is located on the second end.

A field effect transistor (FET) structure includes a substrate, an internal gate, an insulation layer, a semiconductor strip, a gate dielectric insulator, and a gate conductor. The internal gate includes a floor portion located on the substrate and a wall portion extending from the floor portion. The insulation layer is located on the floor portion of the internal gate. The semiconductor strip is located on the wall portion and a portion of the insulation layer, and the semiconductor strip includes source/drain regions and a channel region adjacent to the source/drain regions. The gate dielectric insulator is located on the channel region. The gate conductor is located on the gate dielectric insulator.

A method for producing a spatially patterned structure includes forming a layer of a material on at least a portion of a substructure of the spatially patterned structure, forming a barrier layer of a fluorinated material on the layer of material to provide an intermediate structure, and exposing the intermediate structure to at least one of a second material or radiation to cause at least one of a chemical change or a structural change to at least a portion of the intermediate structure. The barrier layer substantially protects the layer of the material from chemical and structural changes during the exposing. Substructures are produced according to this method.

A method of making a carbon nanotube structure includes depositing a first oxide layer on a substrate and a second oxide layer on the first oxide layer; etching a trench through the second oxide layer; removing end portions of the first oxide layer and portions of the substrate beneath the end portions to form cavities in the substrate; depositing a metal in the cavities to form first body metal pads; disposing a carbon nanotube on the first body metal pads and the first oxide layer such that ends of the carbon nanotube contact each of the first body metal layers; depositing a metal to form second body metal pads on the first body metal pads at the ends of the carbon nanotube; and etching to release the carbon nanotube, first body metal pads, and second body metal pads from the substrate, first oxide layer, and second oxide layer.

Various embodiments may relate to an electronic structure, including at least one organic layer, at least one metal growth layer grown onto the organic layer, and at least one metal layer grown on the metal growth layer. The at least one metal growth layer contains germanium. Various embodiments further relate to a method for producing the electronic structure.