A device includes a semiconductor substrate, a low-k dielectric layer over the semiconductor substrate, an isolation layer over the low-k dielectric layer, and a work function layer over the isolation layer. The work function layer is an n-type work function layer. The device further includes a low-dimensional semiconductor layer on a top surface and a sidewall of the work function layer, source/drain contacts contacting opposing end portions of the low-dimensional semiconductor layer, and a dielectric doping layer over and contacting a channel portion of the low-dimensional semiconductor layer. The dielectric doping layer includes a metal selected from aluminum and hafnium, and the channel portion of the low-dimensional semiconductor layer further comprises the metal.

A carbon nanotube field effect transistor (CNFET), that has a channel formed of carbon nanotubes (CNTs), includes a layered deposit of a nonstoichiometric doping oxide (NDO), such as HfO.sub.X, where the concentration of the NDO varies through the thickness of the layer(s). An n-type metal-oxide semiconductor (NMOS) CNFET made in this manner can achieve similar ON-current, OFF-current, and/or threshold voltage magnitudes to a corresponding p-type metal-oxide semiconductor (PMOS) CNFET. Such an NMOS and PMOS can be used to achieve a symmetric complementary metal-oxide semiconductor (CMOS) CNFET design.

A carbon nanotube field effect transistor (CNFET), that has a channel formed of carbon nanotubes (CNTs), includes a layered deposit of a nonstoichiometric doping oxide (NDO), such as HfO.sub.X, where the concentration of the NDO varies through the thickness of the layer(s). An n-type metal-oxide semiconductor (NMOS) CNFET made in this manner can achieve similar ON-current, OFF-current, and/or threshold voltage magnitudes to a corresponding p-type metal-oxide semiconductor (PMOS) CNFET. Such an NMOS and PMOS can be used to achieve a symmetric complementary metal-oxide semiconductor (CMOS) CNFET design.

The present disclosure provides fine electrodes in which an organic semiconductor does not easily change with time, and which can be applied to manufacturing of a practical integrated circuit of an organic semiconductor device. The present disclosure relates to electrodes for source/drain of an organic semiconductor device, comprising 10 or more sets of electrodes, wherein a channel length between the electrodes in each set is 200 μm or less, and the electrodes in each set have a surface with a surface roughness Rq of 2 nm or less.

Embodiments of forming an image sensor with organic photodiodes are provided. Trenches are formed in the organic photodiodes to increase the PN-junction interfacial area, which improves the quantum efficiency (QE) of the photodiodes. The organic P-type material is applied in liquid form to fill the trenches. A mixture of P-type materials with different work function values and thickness can be used to meet the desired work function value for the photodiodes.

An object of the present invention is to provide a n-type semiconductor element having improved n-type semiconductor characteristics and excellent stability, where the n-type semiconductor element includes a second insulating layer, where the second insulating layer contains: A. (a) a compound having one carbon-carbon double bond or one conjugated system bound to at least one group represented by general formula (1) and at least one group represented by general formula (2); and (b) a polymer; or B. a polymer having, in its molecular structure, the remaining group after removing some hydrogen atoms from R.sup.1, R.sup.2, R.sup.3, or R.sup.4 in the compound (a), or the remaining group after removing some hydrogen atoms from the carbon-carbon double bond or the conjugated system in the compound (a).

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An electronic device includes a substrate, a first oxygen- and water-tight protection layer covering the substrate, at least one electronic component located on the first protection layer and having at least one organic semiconductor region, an oxygen- and water-tight encapsulation layer, the oxygen- and water-tight encapsulation layer having an epoxy or acrylate glue totally covering the organic semiconductor region, a second oxygen- and water-tight protection layer totally covering the encapsulation layer, and a support layer covering the second oxygen- and water-tight protection layer.

A flexible touch panel is provided. Both reduction in thickness and high sensitivity of a touch panel are achieved. The touch panel includes a first flexible substrate, a first insulating layer over the first substrate, a transistor and a light-emitting element over the first insulating layer, a color filter over the light-emitting element, a pair of sensor electrodes over the color filter, a second insulating layer over the sensor electrodes, a second flexible substrate over the second insulating layer, and a protective layer over the second substrate. A first bonding layer is between the light-emitting element and the color filter. The thickness of the first substrate and the second substrate is each 1 μm to 200 μm inclusive. The first bonding layer includes a region with a thickness of 50 nm to 10 μm inclusive.

A technology called RINSE (Removal of Incubated Nanotubes through Selective Exfoliation) is demonstrated. RINSE removes carbon nanotube (CNT) aggregates in CNFETs without compromising CNFET performance. In RINSE, CNTs are deposited on a substrate, coated with a thin adhesive layer, and sonicated. The adhesive layer is strong enough to keep the individual CNTs on the substrate, but not the larger CNT aggregates. When combined with a CNFET CMOS process as disclosed here, record CNFET CMOS yield and uniformity can be realized.

A method to fabricate a resistive change element. The method may include forming a stack over a substrate. The stack may include a conductive material, a resistive change material, a first surface, and a second surfaces opposite the first surface. The method may further include depositing a first material over the stack such that the first material directly contacts at least one of the first surface and the second surface of the stack. The method may also include after depositing the first material, forming a second material over the first material and evaporating a portion of the first material through the second material to create a gap between the second material and the at least one of the first surface and the second surface of the stack.