An OLED panel includes a light emitting substrate and a color filter substrate. The light-emitting substrate includes a multi-layer OLED film emitting white light. The color filter substrate includes a color filter array, a conductive layer that is electrically connected to a wall-shaped elastic conductor that is wearing a metal cap. The two substrates are laminated together in a manner that the metal cap is in direct contact with cathode electrode of the OLED at the site of pixel definition layer. The total resistance of the cathode layer of the OLED is therefore reduced significantly, and voltage-drop on cathode and associated image artifacts are minimized.

Increasing transparency of one or more micro-displays. A method includes attaching a transparent cover to at least a portion of a semiconductor wafer. The at least a portion of the semiconductor wafer includes the one or more micro-displays. The one or more micro-displays include one or more active silicon areas. The method further includes, after the transparent cover has been attached to the at least a portion of the semiconductor wafer, removing silicon between one or more of the active silicon areas.

A method for manufacturing a semiconductor device includes forming a first dielectric layer on a substrate, forming a carbon nanotube (CNT) layer on the first dielectric layer, forming a second dielectric layer on the carbon nanotube (CNT) layer, patterning a plurality of trenches in the second dielectric layer exposing corresponding portions of the carbon nanotube (CNT) layer, forming a plurality of contacts respectively in the plurality of trenches on the exposed portions of the carbon nanotube (CNT) layer, performing a thermal annealing process to create end-bonds between the plurality of the contacts and the carbon nanotube (CNT) layer, and depositing a passivation layer on the plurality of the contacts and the second dielectric layer.

A tensioning device, including a base configured to carry a mask plate, a clamp configured to clamp the mask plate, and a deformation adjusting assembly provided on the base or on the clamp, wherein the deformation adjusting assembly is configured to adjust a deformation of an end portion of the mask plate protruding from the base in a direction of gravity when the base carries the mask plate, so as to make the deformation less than a preset deformation threshold. A base, a clamp and a clamping for the mask plate are also provided.

Exemplary methods of backplane processing are described. The methods may include forming a first metal oxide material on a substrate. The methods may include forming a metal layer over the first metal oxide material. The metal layer may be or include silver. The methods may include forming an amorphous protection material over the metal layer. The amorphous protection material may include a second metal oxide material. The methods may include forming a second metal oxide material over the amorphous protection material. The second metal oxide material may include a crystalline material having one or more grain boundaries. The grain boundaries may include one or more voids.

An organic light emitting diode display includes an integrated circuit, a first electrode, a spacer, an organic material stack layer, and a second electrode. The first electrode is electrically connected to the integrated circuit and has a top surface, a bottom surface, and an inclined surface connecting the top and bottom surfaces. An angle between the inclined surface and the bottom surface is in a range from about 45 degrees to about 80 degrees. The spacer is disposed to cover the inclined surface of the first electrode. The organic material stack layer is disposed on the first electrode. The second electrode is disposed on the organic material stack layer and the spacers.

The disclosure provides an array substrate, a manufacturing method of the array substrate and a display device. The array substrate provided by the embodiment of the present disclosure includes sub-pixel units with multiple light-emitting colors; each sub-pixel unit includes a resonant cavity formed by a reflective layer and a cathode which are oppositely arranged, and the resonant cavity further includes: an anode positioned between the reflective layer and the cathode, and a light-emitting function layer positioned between the anode and the cathode; lengths of resonant cavities of the sub-pixel units with a same one of the light-emitting colors are the same, and lengths of resonant cavities of the sub-pixel units with different light-emitting colors are different; thicknesses of anodes of the sub-pixel units with different light-emitting colors are the same, thicknesses of light-emitting function layers of the sub-pixel units with different light-emitting colors are the same.

In a display region, etching stopper layers are provided between a plurality of inorganic insulating films, openings are formed in the inorganic insulating films located closer to a light-emitting element than the etching stopper layers so as to expose the upper surfaces of the etching stopper layers, and flattening films are provided in the openings such that the openings are filed with the flattening films.

A technique, comprising: forming in situ on a support substrate: a first metal layer; a light-absorbing layer after the first metal layer; a conductor pattern after the light-absorbing layer; and a semiconductor layer after the conductor pattern; patterning the semiconductor layer using a resist mask to form a semiconductor pattern defining one or more semiconductor channels of one or more semiconductor devices; and patterning the light-absorbing layer using the resist mask and the conductor pattern, so as to selectively retain the light-absorbing layer in regions that are occupied by at least one of the resist mask and the conductor pattern.

The present disclosure provides an optical-sensing device, a manufacturing method thereof, and a display panel. The optical-sensing device includes a sensor TFT disposed on a substrate and a switch TFT connected with the sensor TFT. The sensor TFT and the switch TFT include a first active layer and a second active layer, the first active layer comprises a first IGZO layer and a perovskite layer disposed on the first IGZO layer, and the second active layer comprises a second IGZO layer.