Various techniques and apparatus permit fabrication of superconductive circuits. A superconducting integrated circuit comprising a superconducting stud via, a kinetic inductor, and a capacitor may be formed. Forming a superconducting stud via in a superconducting integrated circuit may include masking with a hard mask and masking with a soft mask. Forming a superconducting stud via in a superconducting integrated circuit may include depositing a dielectric etch stop layer. Interlayer misalignment in the fabrication of a superconducting integrated circuit may be measured by an electrical vernier. Interlayer misalignment in the fabrication of a superconducting integrated circuit may be measured by a chain of electrical verniers and a Wheatstone bridge. A superconducting integrated circuit with three or more metal layers may include an enclosed, matched, on-chip transmission line. A metal wiring layer in a superconducting integrated circuit may be encapsulated.

Techniques regarding qubit structures comprising ion implanted Josephson junctions are provided. For example, one or more embodiments described herein can comprise an apparatus that can include a strip of superconducting material coupling a first superconducting electrode and a second superconducting electrode. The strip of superconducting material can have a first region comprising an ion implant and a second region that is free from the ion implant.

A system and method for treating a cavity comprises arranging a niobium structure in a coating chamber, the coating chamber being arranged inside a furnace, coating the niobium structure with tin thereby forming an Nb.sub.3Sn layer on the niobium structure, and doping the Nb.sub.3Sn layer with nitrogen, thereby forming a nitrogen doped Nb.sub.3Sn layer on the niobium structure.

Devices, systems, and/or methods that can facilitate plating one or more metal layers onto a niobium-titanium substrate are provided. According to an embodiment, a device can comprise a niobium-titanium substrate. The device can further comprise a first metal layer plated on a portion of the niobium-titanium substrate. The device can further comprise a second metal layer plated on the first metal layer. The device can further comprise a third metal layer plated on the second metal layer.

A method of fabricating a semiconductor-superconductor hybrid device comprises providing a workpiece comprising a semiconductor component, a layer of a first superconductor material on the semiconductor component, and a layer of a second superconductor material on the first superconductor material, the second superconductor material being different from the first superconductor material; etching the layer of the second superconductor material to expose a portion of the first superconductor material; and oxidising the portion of the first superconductor material to form a passivating layer on the semiconductor. The first superconductor provides energy coupling between the semiconductor and the second superconductor, and the passivating layer protects the semiconductor while allowing electrostatic access thereto. Also provided are a hybrid device, and a method of etching.

A system and method for fabricating accelerator cavities comprises forming at least two half cavities and joining the half cavities with a longitudinal seal. The half cavities can comprise at least one of aluminum, copper, tin, and copper alloys. The half cavities can be coated with a superconductor or combination of materials configured to form a superconductor coating.

The present invention relates to a phononic-isolated Kinetic Inductance Detector (KID) and a method of fabrication thereof. The KID is a highly sensitive superconducting cryogenic detector which can be scaled to very large format arrays. The fabrication process of the KID of the present invention integrates a phononic crystal into a KID architecture. The phononic structures are designed to reduce the loss of recombination and athermal phonons, resulting in lower noise and higher sensitivity detectors.

In a general aspect, an integrated quantum circuit includes a first substrate and a second substrate. The first substrate includes a first surface and a recess formed in the first substrate along the first surface. The recess has a recess surface and is configured to enclose a quantum circuit element. The first substrate includes a first electrically-conductive layer disposed on the first surface and covering at least a portion of the recess surface. The first electrically-conductive layer includes a first superconducting material. The second substrate includes a second surface and a quantum circuit element. The second substrate includes a second electrically-conductive layer on the second surface that includes a second superconducting material. The first substrate is adjacent the second substrate to enclose the quantum circuit device within the recess. The first electrically-conductive layer of the first substrate is electrically-coupled to the second electrically-coupled layer of the second substrate.

A method of fabricating a device including a superconductive layer includes depositing a seed layer on a substrate at a first temperature, the seed layer being a nitride of a first metal, reducing the temperature of the substrate to a second temperature that is lower than the first temperature, increasing the temperature of the substrate to a third temperature that is higher than the first temperature to form a modified seed layer, and depositing a metal nitride superconductive layer directly on the modified seed layer at the third temperature, the superconductive layer being a nitride of a different second metal.

A method of fabricating a device including a superconductive layer includes depositing a seed layer on a substrate, exposing the seed layer to an oxygen-containing gas or plasma to form a modified seed layer, and after exposing the seed layer to the oxygen-containing gas or plasma depositing a metal nitride superconductive layer directly on the modified seed layer. The seed layer is a nitride of a first metal, and the superconductive layer is a nitride of a different second metal.