Patent classifications
H10N60/0156
Superconducting nanowire single photon detector and method of fabrication thereof
A superconductor device is manufactured by depositing a barrier layer over a substrate including silicon, the barrier layer including silicon and nitrogen; depositing a seed layer for a superconductor layer over the barrier layer, the seed layer including aluminum and nitrogen; depositing the superconductor layer over the seed layer, the superconductor layer including a layer of a superconductor material, the barrier layer serving as an oxidation barrier between the layer superconductor material and the substrate; and depositing a silicon cap layer over the superconductor layer. In some embodiments, the superconductor device includes a waveguide and a metal contact at a sufficient distance from the waveguide to prevent optical coupling between the metal contact and the waveguide.
Phononic devices and methods of manufacturing thereof
The present invention relates to a plurality of phononic devices and a method of manufacturing thereof. In one embodiment, highly sensitive superconducting cryogenic detectors integrate phononic crystals into their architecture. The phononic structures are designed to reduce the loss of athermal phonons, resulting in lower noise and higher sensitivity detectors. This fabrication process increases the qp generation recombination rate, thus, reducing the noise equivalent power (NEP) without sacrificing the scalability. A plurality of phononic devices, such as a kinetic inductance detector (KID), a transition edge sensor (TES) bolometer, and quarterwave backshort, can be manufactured according to the methods of the present invention.
RESONATORS
A method for forming a modified resonator is provided. In one aspect, the method includes obtaining a resonator on top of a substrate, thereby forming an interface area between a bottom surface of the resonator and a top surface of the substrate. The resonator can include niobium or tantalum. The method also includes contacting the resonator and the substrate with a liquid acidic etching solution selected so as to have a higher etch rate towards the substrate than towards the resonator and a nonzero etch rate towards the resonator.
Cryogenic refrigeration for low temperature devices
A method for fabricating an active cooling structure, comprising forming an array of Superconductor-Insulator-Normal Metal (NIS) tunnel structures between a non-conducting layer and a superconducting layer. The non-superconducting layer may comprise a plurality of non-superconducting traces running in a first direction. The superconductor layer may comprise a plurality of superconducting traces running in a second direction.
METHOD OF MAKING HIGH CRITICAL TEMPERATURE METAL NITRIDE LAYER
A method of fabricating a device including a superconductive layer includes depositing a seed layer on a substrate, exposing the seed layer to an oxygen-containing gas or plasma to form a modified seed layer, and after exposing the seed layer to the oxygen-containing gas or plasma depositing a metal nitride superconductive layer directly on the modified seed layer. The seed layer is a nitride of a first metal, and the superconductive layer is a nitride of a different second metal.
ELECTROPLATED METAL LAYER ON A NIOBIUM-TITANIUM SUBSTRATE
Devices, systems, and/or methods that can facilitate plating one or more metal layers onto a niobium-titanium substrate are provided. According to an embodiment, a device can comprise a niobium-titanium substrate. The device can further comprise a first metal layer plated on a portion of the niobium-titanium substrate. The device can further comprise a second metal layer plated on the first metal layer. The device can further comprise a third metal layer plated on the second metal layer.
REDUCING PARASITIC CAPACITANCE AND COUPLING TO INDUCTIVE COUPLER MODES
A qubit coupling device includes: a dielectric substrate including a trench; a first superconductor layer on a surface of the dielectric substrate where an edge of the first superconductor layer extends along a first direction and at least a portion of the superconductor layer is in contact with the surface of the dielectric substrate, and where the superconductor layer is formed from a superconductor material exhibiting superconductor properties at or below a corresponding critical temperature; a length of the trench within the dielectric substrate is adjacent to and extends along an edge of the first superconductor layer in the first direction, and where the electric permittivity of the trench is less than the electric permittivity of the dielectric substrate.
Reducing parasitic capacitance and coupling to inductive coupler modes
A qubit coupling device includes: a dielectric substrate including a trench; a first superconductor layer on a surface of the dielectric substrate where an edge of the first superconductor layer extends along a first direction and at least a portion of the superconductor layer is in contact with the surface of the dielectric substrate, and where the superconductor layer is formed from a superconductor material exhibiting superconductor properties at or below a corresponding critical temperature; a length of the trench within the dielectric substrate is adjacent to and extends along an edge of the first superconductor layer in the first direction, and where the electric permittivity of the trench is less than the electric permittivity of the dielectric substrate.
Diffusion barriers for metallic superconducting wires
In various embodiments, superconducting wires incorporate diffusion barriers composed of Ta alloys that resist internal diffusion and provide superior mechanical strength to the wires.
Method of forming superconducting layers and traces
Methods and structures corresponding to superconducting apparatus including superconducting layers and traces are provided. A method for forming a superconducting apparatus includes forming a first dielectric layer on a substrate by depositing a first dielectric material on the substrate and curing the first dielectric material at a first temperature. The method further includes forming a first superconducting layer comprising a first set of patterned superconducting traces on the first dielectric layer. The method further includes forming a second dielectric layer on the first superconducting layer by depositing a second dielectric material on the first superconducting layer and curing the second dielectric material at a second temperature, where the second temperature is lower than the first temperature. The method further includes forming a second superconducting layer comprising a second set of patterned superconducting traces on the second dielectric layer.