A varistor device for voltage-surge-protecting an electronic circuit at a cryogenic temperature comprises an electric lead composed of a superinsulator material, and electrical contact elements. The electrical contact elements are for connecting different positions along the electric lead to the electronic circuit. The electrical contact elements are in electric contact with the electric lead at the different positions along the electric lead. The electric lead is adapted to provide a superinsulating state or a cooper-pair insulating state at the cryogenic temperature, and to provide a non-linear resistance between the different positions at the cryogenic temperature.

A method for forming a thin film resistor with improved thermal stability is disclosed. A substrate having thereon a first dielectric layer is provided. A resistive material layer is deposited on the first dielectric layer. A capping layer is deposited on the resistive material layer. The resistive material layer is then subjected to a thermal treatment at a pre-selected temperature higher than 350 degrees Celsius in a hydrogen or deuterium atmosphere. The capping layer and the resistive material layer are patterned to form a thin film resistor on the first dielectric layer.

A method for forming a thin film resistor with improved thermal stability is disclosed. A substrate having thereon a first dielectric layer is provided. A resistive material layer is deposited on the first dielectric layer. A capping layer is deposited on the resistive material layer. The resistive material layer is then subjected to a thermal treatment at a pre-selected temperature higher than 350 degrees Celsius in a hydrogen or deuterium atmosphere. The capping layer and the resistive material layer are patterned to form a thin film resistor on the first dielectric layer.

The present disclosure relates to semiconductor structures and, more particularly, to a thin film resistor and methods of manufacture. A structure includes: a thin film resistor having an opening and being between an upper insulator material and a lower insulator material; and a contact extending through the opening in the thin film resistor and into the lower insulator material.

The present disclosure relates to semiconductor structures and, more particularly, to a thin film resistor and methods of manufacture. A structure includes: a thin film resistor having an opening and being between an upper insulator material and a lower insulator material; and a contact extending through the opening in the thin film resistor and into the lower insulator material.

A chip resistor includes: a board having a device formation surface, a back surface opposite from the device formation surface and side surfaces connecting the device formation surface to the back surface, a resistor portion provided on the device formation surface, a first connection electrode and a second connection electrode provided on the device formation surface and electrically connected to the resistor portion, and a resin film covering the device formation surface with the first connection electrode and the second connection electrode being exposed therefrom. Intersection portions of the board along which the back surface intersects the side surfaces each have a rounded shape.

A chip resistor includes: a board having a device formation surface, a back surface opposite from the device formation surface and side surfaces connecting the device formation surface to the back surface, a resistor portion provided on the device formation surface, a first connection electrode and a second connection electrode provided on the device formation surface and electrically connected to the resistor portion, and a resin film covering the device formation surface with the first connection electrode and the second connection electrode being exposed therefrom. Intersection portions of the board along which the back surface intersects the side surfaces each have a rounded shape.

An Al.sub.2O.sub.3 carrier has a thin-film structure of platinum or a platinum alloy arranged thereon. The carrier and/or the thin-film structure are adapted to reduce mechanical stresses owing to different thermal expansion coefficients. The carrier and/or the thin-film structure include a surface of the carrier in the region of the thin-film structure is smoothed at least in sections to reduce the adhesion and/or a surface of the carrier has an intermediate layer on which the thin-film structure is arranged. The thermal expansion coefficient of the intermediate layer is from 8*10.sup.6/K to 16*10.sup.6/K, in particular from 8.5*10.sup.6/K to 14*10.sup.6/K, and/or the thin-film structure has at least one conductor path that is undular at least in sections, said conductor path extends laterally along the surface of the carrier.

Method and apparatus for direct writing of passive structures having a tolerance of 5% or less in one or more physical, electrical, chemical, or optical properties. The present apparatus is capable of extended deposition times. The apparatus may be configured for unassisted operation and uses sensors and feedback loops to detect physical characteristics of the system to identify and maintain optimum process parameters.

Method and apparatus for direct writing of passive structures having a tolerance of 5% or less in one or more physical, electrical, chemical, or optical properties. The present apparatus is capable of extended deposition times. The apparatus may be configured for unassisted operation and uses sensors and feedback loops to detect physical characteristics of the system to identify and maintain optimum process parameters.