A manufacturing method of shunt resistor according to the present invention includes a step of calculating a difference between an initial resistance value and a desired resistance value as a resistance value to be adjusted, a step of providing a plurality of recess forming members capable of forming recesses each having a characteristic size in the surface of a resistive alloy plate, a recess determining step of determining the size and the number of the recesses necessary to be formed at the surface of the resistive alloy plate, and a recess forming step of forming the recesses according to the size and the number determined in the recess determining step by using the corresponding recess forming members.

A method of manufacturing an electronic component includes manufacturing a ceramic element including one pair of end surfaces and four side surfaces, forming external electrodes at both end portions of the ceramic element, measuring an initial characteristic value, determining any side surface to be machined among the four side surfaces and then determining, based on stored data, an amount of machining to be performed on the side surface to be machined, and machining, by the determined machining amount, the side surface of the ceramic element, which is determined to be machined, to be flush or substantially flush with the external electrodes.

A method of manufacturing an electronic component includes manufacturing a ceramic element including one pair of end surfaces and four side surfaces, forming external electrodes at both end portions of the ceramic element, measuring an initial characteristic value, determining any side surface to be machined among the four side surfaces and then determining, based on stored data, an amount of machining to be performed on the side surface to be machined, and machining, by the determined machining amount, the side surface of the ceramic element, which is determined to be machined, to be flush or substantially flush with the external electrodes.

A metal plate resistor that is a built-in chip resistor for substrate has a plate shape including a resistance body, a first electrode bonded to a first end of the resistance body with a first clad portion, and a second electrode bonded to a second end of the resistance body with a second clad portion.

A metal plate resistor that is a built-in chip resistor for substrate has a plate shape including a resistance body, a first electrode bonded to a first end of the resistance body with a first clad portion, and a second electrode bonded to a second end of the resistance body with a second clad portion.

A resistive element including a main body portion, and first and second terminal portions with different shapes that are provided at opposite ends of the main body portion in the long-side direction. At least one side portion of the main body portion in the short-side direction has a protruding portion.

A resistive element including a main body portion, and first and second terminal portions with different shapes that are provided at opposite ends of the main body portion in the long-side direction. At least one side portion of the main body portion in the short-side direction has a protruding portion.

A chip resistor includes a base substrate having first and second surfaces opposing each other. First and second resistor layers are separated from each other and are on the first surface of the base substrate. First and second terminals are on opposing end portions of the base substrate, respectively, and are connected to first sides of the first and second resistor layers, respectively. Third and fourth terminals are between the first and second terminals, and are respectively connected to second sides of the first and second resistor layers that respectively oppose the first sides of the first and second resistor layers.

A structure and method for fabricating a laterally configured thin film varistor surge protection device using low temperature sputtering techniques which do not damage IC device components contiguous to the varistor being fabricated. The lateral thin film varistor may include a continuous layer of alternating regions of a first metal oxide layer and a second metal oxide layer formed between two laterally spaced electrodes using a low temperature sputtering process followed by a low temperature annealing process.

A structure and method for fabricating a laterally configured thin film varistor surge protection device using low temperature sputtering techniques which do not damage IC device components contiguous to the varistor being fabricated. The lateral thin film varistor may include a continuous layer of alternating regions of a first metal oxide layer and a second metal oxide layer formed between two laterally spaced electrodes using a low temperature sputtering process followed by a low temperature annealing process.