A ceramic electronic device includes: a multilayer chip in which each of internal electrode layers and each of dielectric layers are alternately stacked, wherein the multilayer chip has a first capacity region having a first electrostatic capacity C.sub.1 and a first inductance L.sub.1 and a second capacity region having a second electrostatic capacity C.sub.2 and a second inductance L.sub.2, wherein the first electrostatic capacity C.sub.1, the first inductance L.sub.1, the second electrostatic capacity C.sub.2 and the second inductance L.sub.2 satisfy (C.sub.1.Math.L.sub.1)/(C.sub.2.Math.L.sub.2)<0.5 or 1.9<(C.sub.1.Math.L.sub.1)/(C.sub.2.Math.L.sub.2).

Each of a supporting-terminal-equipped capacitor chip and a mounted structure thereof includes a capacitor chip and first and second supporting terminals that each have electric conductivity. A maximum diameter size of the first supporting terminal when viewed in an axial direction is larger than a maximum length size of a portion of a first outer electrode on a second main surface in a length direction. A maximum diameter size of the second supporting terminal when viewed in the axial direction is larger than a maximum length size of a portion of a second outer electrode on the second main surface in the length direction.

An electronic component includes an electronic element and an interposer board. The electronic element includes a multilayer body and external electrodes at multilayer body end surfaces of the multilayer body and connected to internal electrode layers. One of the board main surfaces is in a vicinity of the electronic element and joined with a multilayer body main surface in a vicinity of the interposer board. The interposer board is an alumina board. At least one notch is in end regions including a board end surface, a board side surface in a vicinity thereof, a board main surface in a vicinity thereof, ridge portions between the board end surface and the board side surface, between the board end surface and the board main surface, and between the board side surface and the board main surface, and a corner portion between the board end surface, the board side surface, and the board main surface.

An electronic component includes an electronic element and an interposer board. The electronic element includes a multilayer body and external electrodes at a pair of multilayer body end surfaces of the multilayer body and connected to internal electrode layers. The interposer board includes board end surfaces, board side surfaces orthogonal to the board end surfaces, and board main surfaces orthogonal to the board end surfaces and the board side surfaces. One of the board main surfaces is located in a vicinity of the electronic element and joined with one of the multilayer body main surfaces in a vicinity of the interposer board. The interposer board is an alumina board. A mark portion is provided on one of the board main surfaces.

An electronic component includes an electronic element and an interposer board. The electronic element includes a multilayer body and external electrodes at multilayer body end surfaces and connected to internal electrode layers. The interposer board includes board end surfaces, board side surfaces orthogonal to the board end surfaces, and board main surfaces orthogonal to the board end surfaces and the board side surfaces. One of the board main surfaces is in a vicinity of the electronic element and is joined with one of the multilayer body main surfaces in a vicinity of the interposer board. The interposer board is an alumina board. A maximum length of the interposer board is smaller than a length of the electronic element. A width of the interposer board is smaller than a width of the electronic element.

Capacitor assembly, comprising a printed circuit board comprising a first conductive trace and a second conductive trace, and a first row of capacitors comprising a plurality of surface mounted capacitor elements. Each of the plurality of surface mounted capacitor elements comprises a pair of outer electrodes, one of the pair being mounted to the first conductive trace and defining a first junction, and the other one being mounted to the second conductive trace defining a second junction. The first junction and the second junction define a first capacitor longitudinal axis. The first conductive trace has a first current flow direction with a first oblique angle relative to the first capacitor longitudinal axis.

A multilayer ceramic capacitor includes a capacitor main body including a multilayer body and external electrodes, the multilayer body including dielectric layers and internal electrode layers stacked alternately, each of the external electrodes being provided on an end surface in a length direction of the multilayer body and being connected to the internal electrode layers, and two interposers on one surface in a stacking direction of the capacitor main body and spaced apart from each other in the length direction, the interposers including bonding surfaces bondable to the one surface of the capacitor main body and including inner edge portions which are opposite to each other and each having a length longer than a length in a width direction of the multilayer body.

A capacitor packaging having a central termination and three or more capacitors (or groups of capacitors) arranged about the central termination. The electrical flow paths between the termination and the capacitors or groups of capacitors are of substantially the same length. The capacitors or groups of capacitors may be arranged in a generally circular pattern with the termination centered on the center. The termination may include first and second terminals. The capacitors may be mounted to a printed circuit board (“PCB”) with traces on opposite surfaces of the PCB providing electrical flow paths from the terminals to opposite legs of the capacitors. The capacitor packaging may include a primary PCB with a first circular arrangement of capacitors and a secondary PCB with a second circular arrangement of capacitors. The capacitors may be sandwiched between the PCBs with the second arrangement of capacitors disposed concentrically inwardly of the first arrangement.

An element body includes a principal surface arranged to constitute a mounting surface and a first side surface adjacent to the principal surface. An external electrode includes a first electrode portion disposed on the principal surface and a second electrode portion disposed on the first side surface. The first electrode portion includes a sintered metal layer, a conductive resin layer formed on the sintered metal layer, and a plating layer formed on the conductive resin layer. The second electrode portion includes a first region and a second region. The first region includes a sintered metal layer and a plating layer formed on the sintered metal layer. The second region includes a sintered metal layer, a conductive resin layer formed on the sintered metal layer, and a plating layer formed on the conductive resin layer. The second region is located closer to the principal surface than the first region.

An electronic component and a board having the same mounted thereon are provided. The electronic component includes an electronic component including a capacitor array in which a plurality of multilayer capacitors including a capacitor body and a pair of external electrodes, respectively disposed on both end portions of the capacitor body in a first direction, are stacked in a second direction, perpendicular to the first direction, and a length of a multilayer capacitor, disposed on a lower end in the second direction, in the first direction is less than a length of another multilayer capacitor in the first direction; and a pair of metal frames, respectively disposed to be connected to the pair of external electrodes of the multilayer capacitor disposed on the lower end.