Patent classifications
H01H2085/0283
Integrated fuse
A semiconductor wafer includes first zones containing integrated circuits, each first zone including a substrate and a sealing ring at a periphery of the substrate. The first zones are separated from each other by second zones defining cutting lines or paths. The integrated circuit includes an electrically conductive fuse that extends between a first location inside the integrated circuit and a second location situated outside the integrated circuit beyond one of the cutting lines. This electrically conductive fuse includes a portion that passes through the sealing ring and another portion that straddles the adjacent cutting line. The portion of the fuse that passes through is electrically isolated from the sealing ring and from the substrate. The straddling portion is configured to be sliced, when cutting the wafer along the cutting line, so as to cause the fuse to change from an electrical on state to an electrical off state.
Holder for snap-fitting a thermal fuse to an electronic component
The invention provides a holder for snap-fitting a thermal fuse to an electronic component, wherein the holder comprises: a bottom surface for mounting the holder to a carrier comprising the electronic component, wherein the bottom surface comprises an opening for accommodating the electronic component; a first wall parallel to a second wall, wherein the first wall and the second wall each comprise a protrusion for snap-fitting the thermal fuse to the electronic component; a third wall, wherein the third wall comprises an edge for bending around at least one lead of the thermal fuse, wherein a shortest distance between the bottom surface and said edge is larger than a shortest distance between the bottom surface and one of said protrusion.
INTEGRATED FUSE
A semiconductor wafer includes first zones containing integrated circuits, each first zone including a substrate and a sealing ring at a periphery of the substrate. The first zones are separated from each other by second zones defining cutting lines or paths. The integrated circuit includes an electrically conductive fuse that extends between a first location inside the integrated circuit and a second location situated outside the integrated circuit beyond one of the cutting lines. This electrically conductive fuse includes a portion that passes through the sealing ring and another portion that straddles the adjacent cutting line. The portion of the fuse that passes through is electrically isolated from the sealing ring and from the substrate. The straddling portion is configured to be sliced, when cutting the wafer along the cutting line, so as to cause the fuse to change from an electrical on state to an electrical off state.
High speed arc suppressor
A high speed arc suppressor and method include a first phase-specific arc suppressor configured to suppress arcing across contacts of the power contactor in a positive domain and a second phase-specific arc suppressor configured to suppress arcing across the contacts in a negative domain. First and second high speed switches are configured to enable and disable operation of an associated one of the first and second phase-specific arc suppressors. First and second drivers are configured to drive the first and second high speed switches.
Solid-state fuse having multiple control circuits
A solid-state fuse device includes a switch a gate driver connected to the switch and configured to transition the switch from a closed state to an open state when at least one of an overcurrent measurement exceeds a predetermined overcurrent threshold or a voltage drop across the switch exceeds a predetermined saturation voltage threshold.
SEMICONDUCTOR MODULE
A semiconductor module includes a mounting substrate, a transistor mounted on the mounting substrate, a housing configured to house a semiconductor element, a first sealing layer filled in a space inside the housing to seal the transistor, a second sealing layer of a resin material softer than the first sealing layer and layered on the first sealing layer, and a wire electrically connected to the transistor, in which the wire includes a first portion covered with the first sealing layer and a second portion covered with the second sealing layer.
High power, multi-phase, AC power contact arc suppressor
An arc suppressing circuit configured to suppress arcing across a power contactor coupled to an alternating current (AC) power source having a predetermined number of phases, each contact of the power contactor corresponding to one of the predetermined number of phases includes a number of dual unidirectional arc suppressors equal to the predetermined number of phases of the AC power source. Each dual unidirectional arc suppressor includes a first phase-specific arc suppressor configured to suppress arcing across the associated contacts in a positive domain, a a second phase-specific arc suppressor configured to suppress arcing across the associated contacts in a negative domain, and a coil lock controller, configured to be coupled between a contact coil driver of the power contactor, configured to detect an output condition from the contact coil driver and inhibit operation of the first and second phase-specific arc suppressors over a predetermined time.
DEVICES AND METHODS FOR PROGRAMMING A FUSE
Fuse programming circuits, devices and methods. In some embodiments, a fuse circuit can include a fuse pad configured to receive a voltage, a fuse having a first end coupled to the fuse pad and a second end coupled to a switching element configured to enable a current to pass from the fuse pad to a ground potential.
High Speed Arc Suppressor
A high speed arc suppressor and method include a first phase-specific arc suppressor configured to suppress arcing across contacts of the power contactor in a positive domain and a second phase-specific arc suppressor configured to suppress arcing across the contacts in a negative domain. First and second high speed switches are configured to enable and disable operation of an associated one of the first and second phase-specific arc suppressors. First and second drivers are configured to drive the first and second high speed switches.
Sliding contact arc suppression
A sliding power contact and method includes a mobile load device connector and a socket. The mobile load device connector includes a non-current power pin having a first length, a current power pin having a second length less than the first length, a neutral pin, and a ground pin. The socket includes a non-current power contact configured to electrically couple with the non-current power pin, a current power contact configured to electrically couple with the current power pin, a neutral contact configured to electrically couple with the neutral pin, and a ground pin configured to electrically couple with the ground pin. An arc suppressor is directly coupled to at least one of the non-current power pin and the non-current power contact, wherein the arc suppressor, the non-current power pin and the non-current power contact form a current path between the current power pin and the current power contact.