A semiconductor device manufacturing method comprising the steps of providing a matrix substrate having a main surface with plural device areas formed thereon, fixing plural semiconductor chips to the plural device areas respectively, then sealing the plural semiconductor chips all together with resin to form a block sealing member, dividing the block sealing member and the matrix substrate for each of the device areas by dicing, thereafter rubbing a surface of each of the diced sealing member portions with a brush, then storing semiconductor devices formed by the dicing once into pockets respectively of a tray, and conveying the semiconductor devices each individually from the tray. Since the substrate dividing work after block molding is performed by dicing while vacuum-chucking the surface of the block sealing member, the substrate division can be done without imposing any stress on an external terminal mounting surface of the matrix substrate.

A chip singulation method includes, in stated order: forming a surface supporting layer on an upper surface of a wafer; thinning the wafer from the undersurface to reduce the thickness to at most 30 μm; removing the surface supporting layer from the upper surface; forming a first metal layer and subsequently a second metal layer on the undersurface of the wafer; applying a dicing tape onto an undersurface of the second metal layer; applying, onto the upper surface of the wafer, a process of increasing hydrophilicity of a surface of the wafer; forming a water-soluble protective layer on the surface of the wafer; cutting the wafer, the first metal layer, and the second metal layer by irradiating a predetermined region of the upper surface of the wafer with a laser beam; and removing the water-soluble protective layer from the surface of the wafer using wash water.

A semiconductor device that is a chip-size-package-type semiconductor device that is facedown mountable includes: a semiconductor layer including a semiconductor substrate and a low-concentration impurity layer in contact with an upper surface of the semiconductor substrate; a metal layer having a thickness of at least 10 μm; a first vertical MOS transistor in the semiconductor layer; and a second vertical MOS transistor in the semiconductor layer. A side surface of the metal layer includes roughness forming vertical stripes in a direction perpendicular to the metal layer, and has a maximum height of profile greater than 1.0 μm. In a plan view of the semiconductor device, an area occupancy of a formation containing metal in the metal layer is at most 5% in a 10-μm square region located at least 13 μm inward from an outer edge of the semiconductor device, within an upper surface of the semiconductor device.

Disclosed are devices and methodologies for cleaning wafers in wafer processing operations such as solvent cleaning. In an example situation, a wafer that has been separated from a support plate can be cleaned. The wafer still needs to be handled carefully during such a cleaning operation. Various devices and methodologies that facilitate efficient handling of wafers and solvent cleaning operations are disclosed.

A die bonding apparatus includes: a transfer section for transferring a substrate on which a die is to be mounted in a first direction; a cleaning head including a first nozzle, a second nozzle, and a suction aperture; and a drive section that moves the cleaning head in a second direction. The suction aperture first and second sides extend in the first direction in a planar view, and is disposed between blowout openings of the first nozzle and the second nozzle. The blowout opening of the first nozzle extends along the first side of the suction aperture in a planar view, and perpendicularly to a surface of the substrate. The blowout opening of the second nozzle extends along the second side of the suction aperture in a planar view, and aslant toward the suction aperture rather than perpendicularly to the surface of the substrate.

The present invention concerns a method for forming a metal layer for electromagnetic shielding and thermal management of active components, preferably by wet chemical metal plating, using an adhesion promotion layer on the layer of molding compound and forming at least one metal layer on the adhesion promotion layer or forming at least one metal layer on the adhesion promotion layer by wet chemical metal plating processes.

According to one embodiment, there is provided a bonding method of a semiconductor chip. The bonding method includes arranging an activated front surface of a semiconductor chip and an activated front surface of a substrate so as to face each other with a back surface of the semiconductor chip attached to a sheet. The bonding method includes pushing the back surface of the semiconductor chip through the sheet to closely attach the activated front surface of the semiconductor chip and the activated front surface of the substrate. The bonding method includes stripping the sheet from the back surface of the semiconductor chip while maintaining a state in which the activated front surface of the semiconductor chip is closely attached to the activated front surface of the substrate.

A method of processing a workpiece includes: a frame unit preparing step of preparing a frame unit including a tape affixed to an undersurface of the workpiece; a protective film forming step of forming a protective film on a top surface of the workpiece; a cutting step of cutting the workpiece by applying a laser beam; an interval expanding step of widening intervals between chips formed in the cutting step by expanding the tape outward in a radial direction; and an etching step of removing altered regions formed in the respective chips.

A chip singulation method includes, in stated order: forming a surface supporting layer on an upper surface of a wafer; thinning the wafer from the undersurface to reduce the thickness to at most 30 μm; removing the surface supporting layer from the upper surface; forming a first metal layer and subsequently a second metal layer on the undersurface of the wafer; applying a dicing tape onto an undersurface of the second metal layer; applying, onto the upper surface of the wafer, a process of increasing hydrophilicity of a surface of the wafer; forming a water-soluble protective layer on the surface of the wafer; cutting the wafer, the first metal layer, and the second metal layer by irradiating a predetermined region of the upper surface of the wafer with a laser beam; and removing the water-soluble protective layer from the surface of the wafer using wash water.

An element chip smoothing method including: an element chip preparation step of preparing at least one element chip including a first surface covered with a resin film, a second surface opposite the first surface, and a sidewall connecting the first surface to the second surface and having ruggedness; a sidewall cleaning step of exposing the element chip to a first plasma, to remove deposits adhering to the sidewall, with the resin film allowed to continue to exist; a sidewall oxidation step of exposing the element chip to a second plasma, after the sidewall cleaning step, to oxidize a surface of the sidewall, with the resin film allowed to continue to exist; and a sidewall etching step of exposing the element chip to a third plasma, after the sidewall oxidation step, to etch the sidewall, with the resin film allowed to continue to exist.