An electrode array including a substrate. The electrode array includes a first plurality of electrodes disposed above a first zone of the substrate, wherein the first plurality of electrodes has a first range of spacing. The electrode array further includes a second plurality of electrodes disposed above a second zone of the substrate, wherein the second plurality of electrodes has a second range of spacing that is less than the first range of spacing.

A method of forming a semiconductor device is provided such that a trench is formed in a semiconductor body at a first surface of the semiconductor body. Dopants are introduced into a first region at a bottom side of the trench by ion implantation. A filling material is formed in the trench. Dopants are introduced into a second region at a top side of the filling material. Thermal processing of the semiconductor body is carried out and is configured to intermix dopants from the first and the second regions by a diffusion process along a vertical direction perpendicular to the first surface.

A method of manufacturing and using micro assembler systems are described. A method of manufacturing includes disposing a first plurality of electrodes above a first zone of the substrate, wherein the first plurality of electrodes has a first range of spacing. The method further includes disposing a second plurality of electrodes above a second zone of the substrate, wherein the second plurality of electrodes has a second range of spacing that is less than the first range of spacing. A method of using micro assembler systems includes disposing a mobile particle at least partially submersed in an assembly medium above a substrate, a first plurality of electrodes and a second plurality of electrodes. The method further includes conducting a field through individual electrodes of the first plurality of electrodes and the second plurality of electrodes to generate electrophoretic forces or dielectrophoretic forces on the mobile particle.

A method of manufacturing and using micro assembler systems are described. A method of manufacturing includes disposing a first plurality of electrodes above a first zone of the substrate, wherein the first plurality of electrodes has a first range of spacing. The method further includes disposing a second plurality of electrodes above a second zone of the substrate, wherein the second plurality of electrodes has a second range of spacing that is less than the first range of spacing. A method of using micro assembler systems includes disposing a mobile particle at least partially submersed in an assembly medium above a substrate, a first plurality of electrodes and a second plurality of electrodes. The method further includes conducting a field through individual electrodes of the first plurality of electrodes and the second plurality of electrodes to generate electrophoretic forces or dielectrophoretic forces on the mobile particle.

A method of forming a fin field effect transistor (finFET) having fin(s) with reduced dimensional variations, including forming a dummy fin trench within a perimeter of a fin pattern region on a substrate, forming a dummy fin fill in the dummy fin trench, forming a plurality of vertical fins within the perimeter of the fin pattern region, including border fins at the perimeter of the fin pattern region and interior fins located within the perimeter and inside the bounds of the border fins, wherein the border fins are formed from the dummy fin fill, and removing the border fins, wherein the border fins are dummy fins and the interior fins are active vertical fins.

A method of forming a fin field effect transistor (finFET) having fin(s) with reduced dimensional variations, including forming a dummy fin trench within a perimeter of a fin pattern region on a substrate, forming a dummy fin fill in the dummy fin trench, forming a plurality of vertical fins within the perimeter of the fin pattern region, including border fins at the perimeter of the fin pattern region and interior fins located within the perimeter and inside the bounds of the border fins, wherein the border fins are formed from the dummy fin fill, and removing the border fins, wherein the border fins are dummy fins and the interior fins are active vertical fins.

Provided are a thermoelectric material, a method of fabricating the same, and a thermoelectric device. The thermoelectric material includes a first material layer including a chalcogen element; and a second material layer including a reaction compound between the chalcogen element and a metal element, wherein the thermoelectric material has a structure in which the first material layer is inserted in the second material layer.

A conductive-bridging random access memory and a method for fabricating a conductive-bridging random access memory are provided. The conductive-bridging random access memory includes a bottom electrode layer on a semiconductor substrate, an electrical resistance switching layer on the bottom electrode layer, an electron-capturing layer on the electrical resistance switching layer, a barrier layer on the electron-capturing layer, an ion source layer on the barrier layer, and a top electrode layer on the ion source layer. The electron-capturing layer includes electron-capturing material, and the electron affinity of the electron-capturing material is at least 60 KJ/mole.

An electrode array including a substrate. The electrode array includes a first plurality of electrodes disposed above a first zone of the substrate, wherein the first plurality of electrodes has a first range of spacing. The electrode array further includes a second plurality of electrodes disposed above a second zone of the substrate, wherein the second plurality of electrodes has a second range of spacing that is less than the first range of spacing.

An electrode array including a substrate. The electrode array includes a first plurality of electrodes disposed above a first zone of the substrate, wherein the first plurality of electrodes has a first range of spacing. The electrode array further includes a second plurality of electrodes disposed above a second zone of the substrate, wherein the second plurality of electrodes has a second range of spacing that is less than the first range of spacing.