H01L21/16

Method for producing field-effect transistor

A method for producing a field-effect transistor including first-oxide-layer and second-oxide-layer and forming front-channel or back-channel in region where the first-oxide-layer and the second-oxide-layer are adjacent to each other, the method including: forming second-precursor-layer, which is precursor of the second-oxide-layer, so as to be in contact with first-precursor-layer, which is precursor of the first-oxide-layer, and then converting the first-precursor-layer and the second-precursor-layer to the first-oxide-layer and the second-oxide-layer, respectively, the forming includes at least one of treatments (I) and (II) below: (I) treatment of: coating first-oxide-precursor-forming coating liquid that can form precursor of first oxide and contains solvent; and then removing the solvent to form the first-precursor-layer which is the precursor of the first-oxide-layer; and (II) treatment of: coating second-oxide-precursor-forming coating liquid that can form precursor of second oxide and contains solvent; and then removing the solvent to form the second-precursor-layer which is the precursor of the second-oxide-layer.

Indium gallium arsenide metal oxide semiconductor field effect transistor having a low contact resistance to metal electrode

A semiconductor device that includes source and drain regions that are doped to an n-type conductivity and are comprised of a type III-V semiconductor material. The semiconductor device further includes a contact to at least one of the source and drain regions. The contact includes an interface passivation layer atop the at least one source and drain region, and an n-type zinc oxide layer. A conduction band of the type III-V semiconductor material of the at least one source and drain region is substantially aligned with a conduction band of the n-type zinc oxide containing layer.

Non-contact measurement of a stress in a film on a substrate
10553623 · 2020-02-04 · ·

A method for non-contact measurement of stress in a thin-film deposited on a substrate is disclosed. The method may include measuring first topography data of a substrate having a thin-film deposited thereupon. The method may also include comparing the first topography data with second topography data of the substrate that is measured prior to thin-film deposition. The method may further include obtaining a vertical displacement of the substrate based on the comparison between the first topography data and the second topography data. The method may also include detecting a stress value in the thin-film deposited on the substrate based on a fourth-order polynomial equation and the vertical displacement.

Annealing method for improving bonding strength

The present disclosure provides an annealing method for improving interface bonding strength of a wafer. The method includes: providing a substrate, the substrate having a bonding interface; performing a first annealing step, wherein the first annealing step is practiced in an oxygen-containing atmosphere, and an oxidation protection layer is formed on a surface of the substrate through the annealing step; and performing a second annealing step upon the first annealing step, wherein a temperature of the second annealing step is higher than that of the first annealing step, and the second annealing step is practiced in a nitrogen-free environment.

BONDED OBJECT PRODUCTION METHOD AND PRODUCTION METHOD FOR CERAMIC CIRCUIT SUBSTRATE USING SAME

A bonded object production method according to an embodiment uses a continuous furnace to process a stacked body including a metal member, a ceramic member, and a brazing material layer located therebetween, while conveying the stacked body; and the method includes a process of heating the stacked body in an inert atmosphere from 200? C. to a bonding temperature at an average temperature raising rate of the stacked body of not less than 15? C./min, a process of bonding the stacked body in an inert atmosphere at the bonding temperature that is within a range of not less than 600? C. and not more than 950? C., and a process of cooling the stacked body from the bonding temperature to 200? C. at an average temperature lowering rate of the stacked body of not less than 15? C./min. A ceramic substrate is favorably a silicon nitride substrate.

Method and device for processing photoresist component

The present disclosure provides a method for processing a photoresist component, including steps of: placing a photoresist component to be processed on a heating device comprising a plurality of heating components; and controlling, based on a heating parameter, each of the plurality of heating components associated with the heating parameter to heat the photoresist component to be processed. The heating parameter is determined based on a photoresist component parameter of the photoresist component to be processed and a process parameter of forming the photoresist component. The present disclosure further provides a device for processing a photoresist component.

Transparent electrode, manufacturing method thereof and electronic device employing the transparent electrode

The present embodiments provide a transparent electrode having a laminate structure of: a first metal oxide layer having an amorphous structure and electroconductivity, a metal layer made of a metallic material containing silver or copper, a second metal oxide layer having an amorphous structure and electroconductivity, and a third metal oxide layer having an amorphous structure and continuity, stacked in this order.

Semiconductor device and method for fabricating the same

A semiconductor device includes an oxide semiconductor layer, disposed over a substrate. A source electrode of a metal nitride is disposed on the oxide semiconductor layer. A drain electrode of the metal nitride is disposed on the oxide semiconductor layer. A metal-nitride oxidation layer is formed on a surface of the source electrode and the drain electrode. A ratio of a thickness of the metal-nitride oxidation layer to a thickness of the drain electrode or the source electrode is equal to or less than 0.2.

Indium gallium arsenide metal oxide semiconductor field effect transistor having a low contact resistance to metal electrode

A semiconductor device that includes source and drain regions that are doped to an n-type conductivity and are comprised of a type III-V semiconductor material. The semiconductor device further includes a contact to at least one of the source and drain regions. The contact includes an interface passivation layer atop the at least one source and drain region, and an n-type zinc oxide layer. A conduction band of the type III-V semiconductor material of the at least one source and drain region is substantially aligned with a conduction band of the n-type zinc oxide containing layer.

Method of manufacturing semiconductor device

A method of manufacturing a semiconductor device includes: forming a trench on a surface of a semiconductor substrate; forming an oxide film on side surfaces and a bottom surface of the trench; removing at least a part of the oxide film by dry etching from the bottom surface of the trench; and ion-implanting conductive impurities into the semiconductor substrate through the bottom surface of the trench after the dry etching. The dry etching is reactive ion etching in which etching gas including fluorocarbon based gas having a carbon atom ring structure, oxygen gas, and argon gas is used.