H01L21/16

METHOD AND DEVICE FOR PROCESSING PHOTORESIST COMPONENT
20180188565 · 2018-07-05 ·

The present disclosure provides a method for processing a photoresist component, including steps of: placing a photoresist component to be processed on a heating device comprising a plurality of heating components; and controlling, based on a heating parameter, each of the plurality of heating components associated with the heating parameter to heat the photoresist component to be processed. The heating parameter is determined based on a photoresist component parameter of the photoresist component to be processed and a process parameter of forming the photoresist component. The present disclosure further provides a device for processing a photoresist component.

Manufacturing method of semiconductor device

A miniaturized transistor with less variation and highly stable electrical characteristics is provided. Further, high performance and high reliability of a semiconductor device including the transistor are achieved. A semiconductor and a conductor are formed over a substrate, a sacrificial layer is formed over the conductor, and an insulator is formed to cover the sacrificial layer. After that, a top surface of the insulator is removed to expose a top surface of the sacrificial layer. The sacrificial layer and a region of the conductor overlapping with the sacrificial layer are removed, whereby a source region, a drain region, and an opening are formed. Next, a gate insulator and a gate electrode are formed in the opening.

Method for fabricating array substrate, array substrate and display device

The invention relates to a method for fabricating an array substrate, an array substrate and a display device. The method for fabricating an array substrate may comprise: forming a metal thin film layer for a source electrode, a drain electrode and a data line; forming a non-crystalline semiconductor thin film layer on the metal thin film layer; and performing annealing, so as to at least partly convert the non-crystalline semiconductor thin film layer into a metal semiconductor compound. By at least partly converting the non-crystalline semiconductor thin film layer into a metal semiconductor compound, the resulting metal semiconductor compound may prevent oxidative-corrosion of the metal thin film layer, such as a low-resistance metal (e.g., Cu or Ti) layer, in the subsequent procedures, which is favorable for the fabrication of a metal oxide thin film transistor using Cu or Ti.

Method for manufacturing semiconductor device having oxide semiconductor

Disclosed is a method to manufacture a thin film transistor having an oxide semiconductor as a channel formation region. The method includes; forming an oxide semiconductor layer over a gate insulating layer; forming a source and drain electrode layers over and in contact with the oxide semiconductor layer so that at least portion of the oxide semiconductor layer is exposed; and forming an oxide insulating film over and in contact with the oxide semiconductor layer. The exposed portion of the oxide semiconductor may be exposed to a gas containing oxygen in the presence of plasma before the formation of the oxide insulating film. The method allows oxygen to be diffused into the oxide semiconductor layer, which contributes to the excellent characteristics of the thin film transistor.

Display device including transistor and manufacturing method thereof

An object is to provide a display device which operates stably with use of a transistor having stable electric characteristics. In manufacture of a display device using transistors in which an oxide semiconductor layer is used for a channel formation region, a gate electrode is further provided over at least a transistor which is applied to a driver circuit. In manufacture of a transistor in which an oxide semiconductor layer is used for a channel formation region, the oxide semiconductor layer is subjected to heat treatment so as to be dehydrated or dehydrogenated; thus, impurities such as moisture existing in an interface between the oxide semiconductor layer and the gate insulating layer provided below and in contact with the oxide semiconductor layer and an interface between the oxide semiconductor layer and a protective insulating layer provided on and in contact with the oxide semiconductor layer can be reduced.

Semiconductor device and semiconductor device manufacturing method
09735109 · 2017-08-15 · ·

To restrict the deterioration of properties in a semiconductor device due to hydrogen, provided is a semiconductor device including a semiconductor substrate; a hydrogen absorbing layer that is provided above a top surface of the semiconductor substrate and formed of a first metal having a hydrogen absorbing property; a nitride layer that is provided above the hydrogen absorbing layer and formed of a nitride of the first metal; an alloy layer that is provided above the nitride layer and formed of an alloy of aluminum and a second metal; and an electrode layer that is provided above the alloy layer and formed of aluminum. A pure metal layer of the second metal is not provided between the electrode layer and the nitride layer.

Fin field effect transistor including a strained epitaxial semiconductor shell

A semiconductor fin including a single crystalline semiconductor material is formed on a dielectric layer. A semiconductor shell including an epitaxial semiconductor material is formed on all physically exposed surfaces of the semiconductor fin by selective epitaxy, which deposits the semiconductor material only on semiconductor surfaces and not on dielectric surfaces. The epitaxial semiconductor material can be different from the single crystalline semiconductor material, and the semiconductor shell can be bilaterally strained due to lattice mismatch. A fin field effect transistor including a strained channel can be formed. Further, the semiconductor shell can advantageously alter properties of the source and drain regions, for example, by allowing incorporation of more dopants or by facilitating a metallization process.

Fin field effect transistor including a strained epitaxial semiconductor shell

A semiconductor fin including a single crystalline semiconductor material is formed on a dielectric layer. A semiconductor shell including an epitaxial semiconductor material is formed on all physically exposed surfaces of the semiconductor fin by selective epitaxy, which deposits the semiconductor material only on semiconductor surfaces and not on dielectric surfaces. The epitaxial semiconductor material can be different from the single crystalline semiconductor material, and the semiconductor shell can be bilaterally strained due to lattice mismatch. A fin field effect transistor including a strained channel can be formed. Further, the semiconductor shell can advantageously alter properties of the source and drain regions, for example, by allowing incorporation of more dopants or by facilitating a metallization process.

Method for producing thin film transistor
09691906 · 2017-06-27 · ·

A method for producing a thin film transistor including an oxide semiconductor layer includes: depositing an oxide semiconductor film above a substrate by a sputtering method; and forming the oxide semiconductor layer into a predetermined shape by processing the oxide semiconductor film, wherein in the depositing of an oxide semiconductor film, a first oxide semiconductor film is deposited by using a first power density, and a second oxide semiconductor film is then deposited on the first oxide semiconductor film by using a second power density different from the first power density.

Semiconductor device, manufacturing method thereof, and electronic device

A semiconductor device includes a first insulating layer over a substrate, a first metal oxide layer over the first insulating layer, an oxide semiconductor layer over the first metal oxide layer, a second metal oxide layer over the oxide semiconductor layer, a gate insulating layer over the second metal oxide layer, a second insulating layer over the second metal oxide layer, and a gate electrode layer over the gate insulating layer. The gate insulating layer includes a region in contact with a side surface of the gate electrode layer. The second insulating layer includes a region in contact with the gate insulating layer. The oxide semiconductor layer includes first to third regions. The first region includes a region overlapping with the gate electrode layer. The second region, which is between the first and third regions, includes a region overlapping with the gate insulating layer or the second insulating layer. The second and third regions each include a region containing an element N (N is phosphorus, argon, or xenon).