A semiconductor device has a substrate made of a first semiconductor material. The first semiconductor material is silicon carbide. A first semiconductor layer made of the first semiconductor material is disposed over the substrate. A second semiconductor layer made of a second semiconductor material dissimilar from the first semiconductor material is disposed over the first semiconductor layer. The first semiconductor material is substantially defect-free silicon carbide, and the second semiconductor material is silicon. A semiconductor device is formed in the second semiconductor layer. The semiconductor device can be a power MOSFET, diode, insulated gate bipolar transistor, cluster trench insulated gate bipolar transistor, and thyristor. The second semiconductor layer with the electrical component provides a first portion of a breakdown voltage for the semiconductor device and the first semiconductor layer and substrate provide a second portion of the breakdown voltage for the semiconductor device.

A vacuumizing device includes a vacuum chamber, a bonding fixture and a vacuumizing system. The bonding fixture is disposed in the vacuum chamber and includes a substrate table provided with a plurality of grooves for retention of the substrate by suction. The vacuumizing system is disposed in communication with both the vacuum chamber and grooves. During vacuumizing by the vacuumizing system, a vacuum value in the grooves is smaller than or equal to a vacuum value in the vacuum chamber. In the vacuumizing device and methods, the vacuumizing system is used to vacuumize the grooves in the substrate table and the vacuum chamber so that the vacuum value in the grooves is always smaller than or equal to that in the vacuum chamber. As a result, the substrates are firmly retained on the substrate table without warping, thereby improving the quality of substrate bonding.

A device includes an interconnect structure over a substrate, multiple first conductive pads over and connected to the interconnect structure, a planarization stop layer extending over the sidewalls and top surfaces of the first conductive pads of the multiple first conductive pads, a surface dielectric layer extending over the planarization stop layer, and multiple first bonding pads within the surface dielectric layer and connected to the multiple first conductive pads.

According to one embodiment, the array chip includes a three-dimensionally disposed plurality of memory cells and a memory-side interconnection layer connected to the memory cells. The circuit chip includes a substrate, a control circuit provided on the substrate, and a circuit-side interconnection layer provided on the control circuit and connected to the control circuit. The circuit chip is stuck to the array chip with the circuit-side interconnection layer facing to the memory-side interconnection layer. The bonding metal is provided between the memory-side interconnection layer and the circuit-side interconnection layer. The bonding metal is bonded to the memory-side interconnection layer and the circuit-side interconnection layer.

A bonding apparatus includes a first holder, a second holder, a moving unit, a first transforming unit, a second transforming unit and a controller. The first holder holds a first substrate from above. The second holder is provided below the first holder, and holds a second substrate from below. The moving unit moves the first holder and the second holder relative to each other. The first transforming unit makes a central portion of the first substrate held by the first holder protruded downwards. The second transforming unit makes a central portion of the second substrate held by the second holder protruded upwards. The controller performs a control of bringing the central portions into contact with each other. The controller performs a control of changing a protruding amount of the central portion of the first substrate according to a protruding amount of the central portion of the second substrate.

Methods of bonding thin dies to substrates. In one such method, a wafer is attached to a support layer. The wafer and support layer are attached to a dicing structure and then singulated to form a plurality of semiconductor die components. Each semiconductor die component comprises a thinned die and a support layer section attached to the thinned die where each support layer section is disposed between the corresponding thinned die and the dicing structure. At least one of the semiconductor die components is then bonded to a substrate without an intervening adhesive such that the thinned die is disposed between the substrate and the support layer section. The support layer section is then removed from the thinned die.

A bonding system includes a surface modifying apparatus configured to modify a bonding surface of a first substrate and a bonding surface of a second substrate; a surface hydrophilizing apparatus configured to hydrophilize the modified bonding surface of the first substrate and the modified bonding surface of the second substrate; a bonding apparatus configured to perform bonding of the hydrophilized bonding surface of the first substrate and the hydrophilized bonding surface of the second substrate in a state that the bonding surfaces face each other; and a cleaning apparatus configured to clean, before the bonding is performed, a non-bonding surface of, between the first substrate and the second substrate, at least one which is maintained flat when the bonding is performed, the not-bonding surface being opposite to the bonding surface.

In some embodiments, the present disclosure relates to a method that includes aligned a first wafer with a second wafer. The second wafer is spaced apart from the first wafer. The first wafer is arranged on a first electrostatic chuck (ESC). The first ESC has electrostatic contacts that are configured to attract the first wafer to the first ESC. Further, the second wafer is brought toward the first wafer to directly contact the first wafer at an inter-wafer interface. The inter-wafer interface is localized to a center of the first wafer. The second wafer is deformed to gradually expand the inter-wafer interface from the center of the first wafer toward an edge of the first wafer. The electrostatic contacts of the first ESC are turned OFF such that the first and second wafers are bonded to one another by the inter-wafer interface.

The disclosed technology relates to microelectronic devices that can dissipate heat efficiently. In some aspects, such a microelectronic device includes a first semiconductor element and at least one second semiconductor element disposed on the first semiconductor element. The microelectronic device may further include a fluidic cooling unit disposed on the first semiconductor element. In some embodiment, the fluidic cooling unit may include a cavity structure to contain a fluid. In some embodiment, the fluidic cooling unit may include a thermal pathway to transfer heat away from the first semiconductor element.

In one embodiment, a method of manufacturing a semiconductor device includes forming a first semiconductor layer including impurity atoms with a first density, on a first substrate, forming a second semiconductor layer including impurity atoms with a second density higher than the first density, on the first semiconductor layer, and forming a porous layer resulting from porosification of at least a portion of the second semiconductor layer. The method further includes forming a first film including a device, on the porous layer, providing a second substrate provided with a second film including a device, and bonding the first and second substrates to sandwich the first and second films. The method further includes separating the first and second substrates from each other such that a first portion of the porous layer remains on the first substrate and a second portion of the porous layer remains on the second substrate.