Patent classifications
H01L21/18
METHOD OF MANUFACTURING SEMICONDUCTOR ELEMENT
It is an object of the present disclosure to provide a method of manufacturing a thin semiconductor element having a low defect rate. A method of manufacturing a semiconductor element according to the present disclosure includes: forming a metal thin film on an electrode protection layer of a circuit element substrate and a support substrate in vacuum; attaching the metal thin film of the circuit element substrate and the metal thin film of the support substrate by an atomic diffusion joining method; removing a semiconductor substrate by polishing to expose a circuit element; joining a transfer substrate to an exposed surface of the circuit element; and detaching the support substrate from the circuit element after joining the transfer substrate.
Semiconductor device with two-dimensional materials
The present disclosure describes a method that includes forming a first two-dimensional (2D) layer on a first substrate and attaching a second 2D layer to a carrier film. The method also includes bonding the second 2D layer to the first 2D layer to form a heterostack including the first and second 2D layers. The method further includes separating the first 2D layer of the heterostack from the first substrate and attaching the heterostack to a second substrate. The method further includes removing the carrier film from the second 2D layer.
MANUFACTURING METHOD FOR COMPOUND SEMICONDUCTOR DEVICE
A support substrate is bonded to a GaN epitaxial substrate including at least an electron transport layer and an electron supply layer grown on a growth substrate in the Ga-polar direction such that the support substrate faces the Ga-plane of the GaN epitaxial substrate. Furthermore, at least the growth substrate is removed from the GaN epitaxial substrate so as to expose an N-plane of the GaN epitaxial substrate. Subsequently, a semiconductor element is formed on the N-plane side.
WAFER SCALE BONDED ACTIVE PHOTONICS INTERPOSER
There is set forth herein an optoelectrical device, comprising: a substrate; an interposer dielectric stack formed on the substrate, the interposer dielectric stack including a base interposer dielectric stack, a photonics device dielectric stack, and a bond layer that integrally bonds the photonics device dielectric stack to the base interposer dielectric stack. There is set forth herein a method comprising building an interposer base structure on a first wafer having a first substrate, including fabricating a plurality of through vias in the first substrate and fabricating within an interposer base dielectric stack formed on the first substrate one or more metallization layers; and building a photonics structure on a second wafer having a second substrate, including fabricating one or more photonics devices within a photonics device dielectric stack formed on the second substrate.
STRUCTURE WITH CONDUCTIVE FEATURE FOR DIRECT BONDING AND METHOD OF FORMING SAME
Structures and methods for direct bonding are disclosed. A bonded structure can include a first element and a second element. The first element can include a first non-conductive structure that has a non-conductive bonding surface, a cavity that extends at least partially through a thickness of the non-conductive structure from the non-conductive bonding surface, and a first conductive feature that has a first conductive material and a second conductive material over the first conductive material disposed in the cavity. A maximum grain size, in a linear lateral dimension, of the second conductive material can be smaller than 20% of the linear lateral dimension of the conductive feature. There can be less than 20 parts per million (ppm) of impurities at grain boundaries of the second conductive material.
Wafer processing method and apparatus
An apparatus for and a method of bonding a first substrate and a second substrate are provided. In an embodiment a first wafer chuck has a first curved surface and a second wafer chuck has a second curved surface. A first wafer is placed on the first wafer chuck and a second wafer is placed on a second wafer chuck, such that both the first wafer and the second wafer are pre-warped prior to bonding. Once the first wafer and the second wafer have been pre-warped, the first wafer and the second wafer are bonded together.
DIFFUSION TOLERANT III-V SEMICONDUCTOR HETEROSTRUCTURES AND DEVICES INCLUDING THE SAME
Semiconductor devices including a subfin including a first III-V compound semiconductor and a channel including a second III-V compound semiconductor are described. In some embodiments the semiconductor devices include a substrate including a trench defined by at least two trench sidewalls, wherein the first III-V compound semiconductor is deposited on the substrate within the trench and the second III-V compound semiconductor is epitaxially grown on the first III-V compound semiconductor. In some embodiments, a conduction band offset between the first III-V compound semiconductor and the second III-V compound semiconductor is greater than or equal to about 0.3 electron volts. Methods of making such semiconductor devices and computing devices including such semiconductor devices are also described.
METHOD OF MANUFACTURING A BONDED SUBSTRATE STACK BY SURFACE ACTIVATION
A method of manufacturing a bonded substrate stack includes: providing a first substrate having a first hybrid interface layer, the first hybrid interface layer including a first insulator and a first metal; and providing a second substrate having a second hybrid interface layer, the second hybrid interface layer including a second insulator and a second metal. The hybrid interface layers are surface-activated to generate dangling bonds on the hybrid interface layers. The surface-activated hybrid interface layers are brought into contact, such that the dangling bonds of the first hybrid interface layer and the dangling bonds of the second hybrid interface layer bond together to form first insulator to second insulator bonds and first metal to second metal bonds.
METHOD FOR PREPARING A SELF-SUPPORTING SUBSTRATE
A method for preparing a self-supporting substrate includes: preparing a thin film base structure including a first substrate layer, a thin film layer and a second substrate layer stacked in sequence; removing the first substrate layer from the thin film layer; continuing to grow a material the same as that of the thin film layer on a side of the thin film layer far away from the second substrate layer to prepare a thick film layer; and removing the second substrate layer from the thick film layer and remaining the thick film layer. In the method, a thin film may be grown on a substrate that has a larger diameter, and a thinness of the thin film will not cause the thin film and/or the substrate to crack. Therefore, a thin film that has a large diameter may be obtained so as to obtain a large-sized self-supporting thick film substrate.
Semiconductor substrate, semiconductor element and method for producing semiconductor substrate
A semiconductor substrate includes a single crystal Ga.sub.2O.sub.3-based substrate and a polycrystalline substrate that are bonded to each other. A thickness of the single crystal Ga.sub.2O.sub.3-based substrate is smaller than a thickness of the polycrystalline substrate, and a fracture toughness value of the polycrystalline substrate is higher than a fracture toughness value of the single crystal Ga.sub.2O.sub.3-based substrate.