The present invention relates to an electronic device pick-and-place system and an electronic device testing apparatus having the same, comprising a plurality of pick-and-place heads, a plurality of negative pressure generators and an air pressure regulating valve. Each pick-and-place head has a pick-and-place port; the plurality of negative pressure generators are communicated with the plurality of pick-and-place ports of the plurality of pick-and-place heads respectively; an inlet end of the air pressure regulating valve is communicated with an air pressure source, and an outlet end of the air pressure regulating valve is communicated with the plurality of negative pressure generators; the air pressure regulating valve can be used to adjust the suction forces of the pick-and-place ports of the pick-and-place heads in a batch. Accordingly, the suction forces and blowing forces of the pick-and-place ports of the pick-and-place heads can be adjusted in a batch.

In certain embodiments, a workstation includes: a cleaning station configured to clean a die vessel, wherein the die vessel is configured to secure a semiconductor die; an inspection station configured to inspect the die vessel after cleaning to determine whether the die vessel is identified as passing inspection; and a conveyor configured to move the die vessel between the cleaning station and the inspection station.

Apparatus and methods for handling die carriers are disclosed. In one example, a disclosed apparatus includes: a load port configured to load a die carrier operable to hold a plurality of dies into a processing tool; and a lane changer coupled to the load port and configured to move at least one die in the die carrier to an input of the processing tool and transfer the at least one die into the processing tool for processing the at least one die.

In an embodiment, a system includes: a warehousing apparatus configured to interface with a semiconductor die processing tool configured to process a semiconductor die singulated from a wafer, wherein the semiconductor die processing tool comprise an in-port and an out-port, wherein the warehousing apparatus is configured to: move a first die vessel that contains the semiconductor die to the in-port from a first die vessel container, wherein the first die vessel container is configured to house the first die vessel; move the first die vessel from the in-port to a buffer region; and move a second die vessel from the buffer region to the out-port.

In certain embodiments, a system includes: a source lane configured to move a first die container between a load port and a source lane staging area; an inspection sensor configured to produce a sensor result based on a die on the first die container; a pass target lane configured to move a second die container between a pass target lane out port and a pass target lane staging area; a fail target lane configured to move a third die container between a fail target lane out port and a fail target lane staging area; and a conveyor configured to move the die from the first die container at the source lane staging area to either the second die container at the pass target lane staging area or the fail target lane staging area based on the sensor result.

A carrier tape has a central portion, and first and second rows of device pockets and dummy pockets. The device pockets are smaller in size than the dummy pockets. The pockets in each of the first and second rows are vertically aligned and are separated vertically from each other by an equal distance. Vertically aligned and adjacent pockets may be horizontally separated relative to each other by a constant dimension, a regularly or irregularly increasing or decreasing dimension, or both a regularly or irregularly increasing or decreasing dimension. Vertically aligned and adjacent pockets may also vary in positioning relative to an upper edge of the carrier tape in an increasing or decreasing regular or irregular dimension or both. The carrier tape may be layered on a reel during transportation.

The invention provides a chip carrier, a chip testing module and a chip handling module. The chip carrier for carrying a plurality of chips comprises a main body with an upper surface and a lower surface. The main body has a plurality of air guide holes, and two ends of each air guide hole are respectively exposed on the upper surface and the lower surface. A part of the air guide holes are defined as a first group, and the air guide holes of the first group are connected. The main body is made of conductive material.

Provided is a display transfer structure including a substrate including a plurality of wells, and a plurality of light emitting elements disposed in the plurality of wells, wherein the plurality of light emitting elements have a rotationally asymmetric planar shape, and wherein the plurality of wells respectively have a planar shape different from a planar shape of each of the plurality of light emitting elements.

In certain embodiments, a system includes: an inspection station configured to receive a die vessel, wherein the inspection station is configured to inspect the die vessel for defects; a desiccant station configured to receive the die vessel from the inspection station, wherein the desiccant station is configured to add a desiccant to the die vessel; a bundle station configured to receive the die vessel from the desiccant station, wherein the bundle station is configured to combine the die vessel with another die vessel as a die bundle; and a bagging station configured to receive the die bundle from the bundle station, wherein the bagging station is configured to dispose the die bundle in a die bag and to heat seal the die bag with the die bundle inside.

A carrier structure suitable for transferring or supporting a plurality of micro devices includes a carrier and a plurality of transfer units. The carrier has a carrier surface and a plurality of recesses disposed on the carrier surface. The transfer units are respectively disposed in the recesses and a plurality of transferring surfaces are exposed. Each micro device has a device surface. The transferring surface of each transfer unit is configured to be connected to the device surface of the corresponding micro device. A micro device structure including the carrier structure is also provided.