A method of processing a warped workpiece includes a warpage eliminating step of applying a laser beam whose wavelength is transmittable through the workpiece to the workpiece while positioning a focused spot of the laser beam in the workpiece at a predetermined first position thicknesswise across the workpiece, thereby forming modified layers in the workpiece and cracks extending from the modified layers to a lower surface of the workpiece along all of projected dicing lines on the workpiece, thereby eliminating the warpage from the workpiece, and a modified layer forming step of, after the warpage eliminating step, applying the laser beam to the workpiece while positioning the focused spot of the laser beam in the workpiece at a position above the first position away from the lower surface of the workpiece, thereby forming modified layers in the workpiece along the projected dicing lines.

A method of processing a warped workpiece includes a warpage eliminating step of applying a laser beam whose wavelength is transmittable through the workpiece to the workpiece while positioning a focused spot of the laser beam in the workpiece at a predetermined first position thicknesswise across the workpiece, thereby forming modified layers in the workpiece and cracks extending from the modified layers to a lower surface of the workpiece along all of projected dicing lines on the workpiece, thereby eliminating the warpage from the workpiece, and a modified layer forming step of, after the warpage eliminating step, applying the laser beam to the workpiece while positioning the focused spot of the laser beam in the workpiece at a position above the first position away from the lower surface of the workpiece, thereby forming modified layers in the workpiece along the projected dicing lines.

A first peel-off layer extending along a side surface of a truncated cone that has a first bottom surface positioned near a face side of a wafer and a second bottom surface positioned within the wafer and smaller in diameter than the first bottom surface, and a second peel-off layer extending along the second bottom surface of the truncated cone are formed in the wafer. Then, external forces are exerted on the wafer thicknesswise of the wafer, thereby dividing the wafer along the first peel-off layer and the second peel-off layer that function as division initiating points.

A first peel-off layer extending along a side surface of a truncated cone that has a first bottom surface positioned near a face side of a wafer and a second bottom surface positioned within the wafer and smaller in diameter than the first bottom surface, and a second peel-off layer extending along the second bottom surface of the truncated cone are formed in the wafer. Then, external forces are exerted on the wafer thicknesswise of the wafer, thereby dividing the wafer along the first peel-off layer and the second peel-off layer that function as division initiating points.

A wafer producing method includes a peel-off layer forming step of forming a peel-off layer by positioning a focused spot of a laser beam having a wavelength transmittable through an ingot to a depth corresponding to a thickness of the wafer to be produced from the ingot from a first end surface of the ingot and applying the laser beam to the ingot, a first chamfered portion forming step of forming a first chamfered portion by applying, from the first end surface side to a peripheral surplus region of the wafer, a laser beam having a wavelength absorbable by the wafer, a peeling-off step of peeling off the wafer to be produced, and a second chamfered portion forming step of forming a second chamfered portion by applying, from a peel-off surface side of the wafer, the laser beam having a wavelength absorbable by the wafer.

A memory device includes an array of memory cells configured on a die or chip and coupled to sense lines and access lines of the die or chip and a respective sense amplifier configured on the die or chip coupled to each of the sense lines. Each of a plurality of subsets of the sense lines is coupled to a respective local input/output (I/O) line on the die or chip for communication of data on the die or chip and a respective transceiver associated with the respective local I/O line, the respective transceiver configured to enable communication of the data to one or more device off the die or chip.

A semiconductor package is provided. The semiconductor package includes a lower structure including an upper insulating layer and an upper pad; and a semiconductor chip provided on the lower structure and comprising a lower insulating layer and a lower pad. The lower insulating layer is in contact with and coupled to the upper insulating layer and the lower pad is in contact with and coupled to the upper pad, and a lateral side of the semiconductor chip extends between an upper side and a lower side of the semiconductor chip and comprises a recessed portion.

A semiconductor package is provided. The semiconductor package includes a lower structure including an upper insulating layer and an upper pad; and a semiconductor chip provided on the lower structure and comprising a lower insulating layer and a lower pad. The lower insulating layer is in contact with and coupled to the upper insulating layer and the lower pad is in contact with and coupled to the upper pad, and a lateral side of the semiconductor chip extends between an upper side and a lower side of the semiconductor chip and comprises a recessed portion.

A cavity substrate may have a directional optoelectronic transmission channel. The cavity substrate includes a support frame, a first dielectric layer on a first surface of the support frame, and a second dielectric layer on a second surface of the support frame. The support frame, the first dielectric layer and the second dielectric layer constitute a closed cavity having an opening on one side in the length direction of the substrate, a first circuit layer is arranged on the inner surface of the first dielectric layer facing the cavity, an electrode connected with an optical communication device is arranged on the first circuit layer, the electrode is electrically conducted with the first circuit layer, a second circuit layer is arranged on the outer surfaces of the first dielectric layer and the second dielectric layer, and the first circuit layer and the second circuit layer are communicated through a via column.

Implementations of methods of singulating a plurality of die included in a substrate may include forming a plurality of die on a first side of a substrate, forming a backside metal layer on a second side of a substrate, applying a photoresist layer over the backside metal layer, patterning the photoresist layer along a die street of the substrate, and etching through the backside metal layer located in the die street of the substrate. The substrate may be exposed through the etch. The method may also include singulating the plurality of die included in the substrate through removing a substrate material in the die street.